12 files changed, 44 insertions, 16 deletions
diff --git a/src/cpu/cpu.ts b/src/cpu/cpu.ts
index d26ef8f..cd9e3e4 100644
--- a/src/cpu/cpu.ts
+++ b/src/cpu/cpu.ts
@@ -80,7 +80,10 @@ export class CPU {
   nextInterrupt: i16 = -1;
   maxInterrupt: i16 = 0;
 
-  constructor(public progMem: Uint16Array, private sramBytes = 8192) {
+  constructor(
+    public progMem: Uint16Array,
+    private sramBytes = 8192,
+  ) {
     this.reset();
   }
 
diff --git a/src/cpu/instruction.ts b/src/cpu/instruction.ts
index e2bed5d..d29bfb8 100644
--- a/src/cpu/instruction.ts
+++ b/src/cpu/instruction.ts
@@ -393,7 +393,7 @@ export function avrInstruction(cpu: CPU) {
     cpu.cycles++;
     cpu.data[(opcode & 0x1f0) >> 4] = cpu.readData(
       cpu.dataView.getUint16(28, true) +
-        ((opcode & 7) | ((opcode & 0xc00) >> 7) | ((opcode & 0x2000) >> 8))
+        ((opcode & 7) | ((opcode & 0xc00) >> 7) | ((opcode & 0x2000) >> 8)),
     );
   } else if ((opcode & 0xfe0f) === 0x8000) {
     /* LDZ, 1000 000d dddd 0000 */
@@ -419,7 +419,7 @@ export function avrInstruction(cpu: CPU) {
     cpu.cycles++;
     cpu.data[(opcode & 0x1f0) >> 4] = cpu.readData(
       cpu.dataView.getUint16(30, true) +
-        ((opcode & 7) | ((opcode & 0xc00) >> 7) | ((opcode & 0x2000) >> 8))
+        ((opcode & 7) | ((opcode & 0xc00) >> 7) | ((opcode & 0x2000) >> 8)),
     );
   } else if (opcode === 0x95c8) {
     /* LPM, 1001 0101 1100 1000 */
@@ -716,7 +716,7 @@ export function avrInstruction(cpu: CPU) {
     cpu.writeData(
       cpu.dataView.getUint16(28, true) +
         ((opcode & 7) | ((opcode & 0xc00) >> 7) | ((opcode & 0x2000) >> 8)),
-      cpu.data[(opcode & 0x1f0) >> 4]
+      cpu.data[(opcode & 0x1f0) >> 4],
     );
     cpu.cycles++;
   } else if ((opcode & 0xfe0f) === 0x8200) {
@@ -744,7 +744,7 @@ export function avrInstruction(cpu: CPU) {
     cpu.writeData(
       cpu.dataView.getUint16(30, true) +
         ((opcode & 7) | ((opcode & 0xc00) >> 7) | ((opcode & 0x2000) >> 8)),
-      cpu.data[(opcode & 0x1f0) >> 4]
+      cpu.data[(opcode & 0x1f0) >> 4],
     );
     cpu.cycles++;
   } else if ((opcode & 0xfc00) === 0x1800) {
diff --git a/src/peripherals/adc.ts b/src/peripherals/adc.ts
index 1e0e2d1..16ccdba 100644
--- a/src/peripherals/adc.ts
+++ b/src/peripherals/adc.ts
@@ -163,7 +163,10 @@ export class AVRADC {
     enableMask: ADIE,
   };
 
-  constructor(private cpu: CPU, private config: ADCConfig) {
+  constructor(
+    private cpu: CPU,
+    private config: ADCConfig,
+  ) {
     cpu.writeHooks[config.ADCSRA] = (value, oldValue) => {
       if (value & ADEN && !(oldValue && ADEN)) {
         this.conversionCycles = 25;
diff --git a/src/peripherals/clock.ts b/src/peripherals/clock.ts
index d443843..bf49ac9 100644
--- a/src/peripherals/clock.ts
+++ b/src/peripherals/clock.ts
@@ -35,7 +35,7 @@ export class AVRClock {
   constructor(
     private cpu: CPU,
     private baseFreqHz: u32,
-    private config: AVRClockConfig = clockConfig
+    private config: AVRClockConfig = clockConfig,
   ) {
     this.cpu.writeHooks[this.config.CLKPR] = (clkpr) => {
       if ((!this.clockEnabledCycles || this.clockEnabledCycles < cpu.cycles) && clkpr === CLKPCE) {
diff --git a/src/peripherals/eeprom.ts b/src/peripherals/eeprom.ts
index 045ffe8..98c2cc6 100644
--- a/src/peripherals/eeprom.ts
+++ b/src/peripherals/eeprom.ts
@@ -85,7 +85,7 @@ export class AVREEPROM {
   constructor(
     private cpu: CPU,
     private backend: EEPROMBackend,
-    private config: AVREEPROMConfig = eepromConfig
+    private config: AVREEPROMConfig = eepromConfig,
   ) {
     this.cpu.writeHooks[this.config.EECR] = (eecr) => {
       const { EEARH, EEARL, EECR, EEDR } = this.config;
diff --git a/src/peripherals/gpio.ts b/src/peripherals/gpio.ts
index 0da9d50..92435b9 100644
--- a/src/peripherals/gpio.ts
+++ b/src/peripherals/gpio.ts
@@ -219,7 +219,10 @@ export class AVRIOPort {
   private lastPin: u8 = 0;
   openCollector: u8 = 0;
 
-  constructor(private cpu: CPU, readonly portConfig: Readonly<AVRPortConfig>) {
+  constructor(
+    private cpu: CPU,
+    readonly portConfig: Readonly<AVRPortConfig>,
+  ) {
     cpu.gpioPorts.add(this);
     cpu.gpioByPort[portConfig.PORT] = this;
 
@@ -259,7 +262,7 @@ export class AVRIOPort {
             enableRegister: externalConfig.EIMSK,
             enableMask: 1 << externalConfig.index,
           }
-        : null
+        : null,
     );
     const EICR = new Set(externalInterrupts.map((item) => item?.EICR));
     for (const EICRx of EICR) {
diff --git a/src/peripherals/spi.ts b/src/peripherals/spi.ts
index 3167c07..824b13a 100644
--- a/src/peripherals/spi.ts
+++ b/src/peripherals/spi.ts
@@ -63,7 +63,11 @@ export class AVRSPI {
     enableMask: SPCR_SPIE,
   };
 
-  constructor(private cpu: CPU, private config: SPIConfig, private freqHz: number) {
+  constructor(
+    private cpu: CPU,
+    private config: SPIConfig,
+    private freqHz: number,
+  ) {
     const { SPCR, SPSR, SPDR } = config;
     cpu.writeHooks[SPDR] = (value: u8) => {
       if (!(cpu.data[SPCR] & SPCR_SPE)) {
diff --git a/src/peripherals/timer.ts b/src/peripherals/timer.ts
index 93b9d19..dfbba35 100644
--- a/src/peripherals/timer.ts
+++ b/src/peripherals/timer.ts
@@ -342,7 +342,10 @@ export class AVRTimer {
     enableMask: this.config.OCIEC,
   };
 
-  constructor(private cpu: CPU, private config: AVRTimerConfig) {
+  constructor(
+    private cpu: CPU,
+    private config: AVRTimerConfig,
+  ) {
     this.updateWGMConfig();
     this.cpu.readHooks[config.TCNT] = (addr: u8) => {
       this.count(false);
diff --git a/src/peripherals/twi.ts b/src/peripherals/twi.ts
index 9af1749..3d0275c 100644
--- a/src/peripherals/twi.ts
+++ b/src/peripherals/twi.ts
@@ -105,7 +105,11 @@ export class AVRTWI {
     enableMask: TWCR_TWIE,
   };
 
-  constructor(private cpu: CPU, private config: TWIConfig, private freqHz: number) {
+  constructor(
+    private cpu: CPU,
+    private config: TWIConfig,
+    private freqHz: number,
+  ) {
     this.updateStatus(STATUS_TWI_IDLE);
     this.cpu.writeHooks[config.TWCR] = (value) => {
       this.cpu.data[config.TWCR] = value;
diff --git a/src/peripherals/usart.ts b/src/peripherals/usart.ts
index 1b7546b..9babe16 100644
--- a/src/peripherals/usart.ts
+++ b/src/peripherals/usart.ts
@@ -109,7 +109,11 @@ export class AVRUSART {
     enableMask: UCSRB_TXCIE,
   };
 
-  constructor(private cpu: CPU, private config: USARTConfig, private freqHz: number) {
+  constructor(
+    private cpu: CPU,
+    private config: USARTConfig,
+    private freqHz: number,
+  ) {
     this.reset();
     this.cpu.writeHooks[config.UCSRA] = (value, oldValue) => {
       cpu.data[config.UCSRA] = value & (UCSRA_MPCM | UCSRA_U2X);
diff --git a/src/peripherals/watchdog.ts b/src/peripherals/watchdog.ts
index dc66220..979151f 100644
--- a/src/peripherals/watchdog.ts
+++ b/src/peripherals/watchdog.ts
@@ -57,7 +57,11 @@ export class AVRWatchdog {
     enableMask: WDTCSR_WDIE,
   };
 
-  constructor(private cpu: CPU, private config: WatchdogConfig, private clock: AVRClock) {
+  constructor(
+    private cpu: CPU,
+    private config: WatchdogConfig,
+    private clock: AVRClock,
+  ) {
     const { WDTCSR } = config;
     this.cpu.onWatchdogReset = () => {
       this.resetWatchdog();
diff --git a/src/utils/test-utils.ts b/src/utils/test-utils.ts
index e620748..90558d5 100644
--- a/src/utils/test-utils.ts
+++ b/src/utils/test-utils.ts
@@ -19,7 +19,7 @@ const defaultOnBreak = () => {
 export class TestProgramRunner {
   constructor(
     private readonly cpu: CPU,
-    private readonly onBreak: (cpu: CPU) => void = defaultOnBreak
+    private readonly onBreak: (cpu: CPU) => void = defaultOnBreak,
   ) {}
 
   runInstructions(count: number) {