aboutsummaryrefslogtreecommitdiff
path: root/src/cpu/cpu.ts (follow)
Commit message (Expand)AuthorAgeFilesLines
* avr32dd20 compat, onSleep hookHEADmainavr32dd20Apexo3 days1-1/+29
* style: organize importsUri Shaked2026-02-141-2/+1
* docs: add copyright notice to source codeUri Shaked2025-02-111-0/+3
* chore(deps): upgrade prettierUri Shaked2025-02-111-1/+4
* fix(cpu): don't clear RAM on reset #107Uri Shaked2022-04-301-1/+0
* perf(cpu): speed up interruptsUri Shaked2022-01-201-11/+28
* fix(eeprom): EEPROM interrupt not firing #110Uri Shaked2021-10-241-2/+3
* refactor: remove the ICPU interfaceUri Shaked2021-09-101-29/+14
* feat(watchdog): implement watchdog timer #106Uri Shaked2021-09-101-0/+11
* fix(gpio): CBI/SBI handling in writes to PIN register #103Uri Shaked2021-09-071-4/+4
* feat(timer): external timer support #97Uri Shaked2021-08-151-2/+1
* feat(gpio): external interrupt/PCINT support (#82)Uri Shaked2021-07-071-0/+2
* perf(cpu): speed up event systemUri Shaked2021-06-201-25/+47
* feat(usart): implement RX #11Uri Shaked2021-02-191-1/+2
* perf(cpu): speed up event systemUri Shaked2020-12-121-18/+28
* fix(cpu): event system issueUri Shaked2020-12-121-2/+2
* perf!: centeral timekeepingUri Shaked2020-12-091-1/+44
* refactor: central interrupt handling #38Uri Shaked2020-12-091-3/+76
* feat(timer): Compare Match Output (#45)Uri Shaked2020-05-251-0/+4
* fix(timer): incorrect high counter byte behaviorUri Shaked2020-04-281-0/+8
* feat(instruction): 22-bit PC support #31Uri Shaked2020-04-091-2/+16
* refactor: added peripherals and cpu feature folderslironh2020-03-221-0/+78
generated by cgit v1.2.3 (git 2.25.1) at 2026-03-31 17:23:01 +0000