| Commit message (Collapse) | Author | Files | Lines | ||
|---|---|---|---|---|---|
| 2021-09-07 | fix(gpio): CBI/SBI handling in writes to PIN register #103 | Uri Shaked | 1 | -2/+4 | |
| fix #103 | |||||
| 2020-09-30 | fix(cpu): incorrect address for RAMPZ / EIND | Uri Shaked | 1 | -6/+6 | |
| We used their I/O space address intead of their data space address. close #61 | |||||
| 2020-09-02 | fix(instruction): EICALL is broken | Uri Shaked | 1 | -1/+2 | |
| close #59 | |||||
| 2020-04-29 | fix(timer): Reading TCNT in 2-cycle instructions | Uri Shaked | 1 | -12/+12 | |
| close #40 | |||||
| 2020-04-28 | fix(instruction): LD, ST instructions should take 2 clock cycles | Uri Shaked | 1 | -6/+19 | |
| close #39 | |||||
| 2020-04-09 | feat(instruction): 22-bit PC support #31 | Uri Shaked | 1 | -10/+30 | |
| adapt CALL, ICALL, RCALL, RET, and RETI for MCUs with 22-bit PC | |||||
| 2020-04-09 | feat(instruction): implement EICALL, EIJMP #31 | Uri Shaked | 1 | -0/+15 | |
| 2020-04-08 | feat(instruction): implement ELPM #31 | Uri Shaked | 1 | -0/+21 | |
| 2020-03-22 | refactor: added peripherals and cpu feature folders | lironh | 1 | -1/+1 | |
| 2020-03-18 | style(cpu): relocate some stray comments | Uri Shaked | 1 | -4/+4 | |
| 2020-03-18 | Move first comment inside function | gfeun | 1 | -1/+1 | |
| 2020-03-18 | Optimize opcode check | gfeun | 1 | -372/+186 | |
| 2019-12-01 | feat: add benchmarking code | Uri Shaked | 1 | -15/+15 | |
| 2019-11-20 | fix: SREG issues in ADC, CPC, SBC, SBCI | Uri Shaked | 1 | -9/+6 | |
| also added regression test cases | |||||
| 2019-11-20 | feat: implement most instructions | Uri Shaked | 1 | -113/+303 | |
| 2019-11-20 | feat: LPM, LSR, MOV, MOVW, MUL, MULS, MULSU, NEG | Uri Shaked | 1 | -10/+51 | |
| + tests | |||||
| 2019-11-20 | feat: LAC, LAS, LAT, LDS instructions + tests | Uri Shaked | 1 | -4/+18 | |
| 2019-11-20 | feat: more instructions | Uri Shaked | 1 | -14/+78 | |
| implement ADC, ADD, ADIW, AND, ANDI, ASR, BCLR, BLD, BRBC, BRBS, test some of them | |||||
| 2019-11-19 | feat: CALL, INC, RET, RETI, ROR instructions | Uri Shaked | 1 | -5/+36 | |
| 2019-11-19 | doc: avr8js → AVR8js | Uri Shaked | 1 | -1/+1 | |
| 2019-11-19 | feat: LDY/LDZ/LDDY/LDDZ instructions + tests | Uri Shaked | 1 | -15/+47 | |
| 2019-11-19 | feat: STY/STZ/STDY/STDZ instructions + tests | Uri Shaked | 1 | -10/+33 | |
| 2019-11-19 | feat: implement LDX instructions | Uri Shaked | 1 | -7/+15 | |
| 2019-11-19 | doc: add opcode next to each instruction | Uri Shaked | 1 | -95/+95 | |
| 2019-11-19 | feat: implement STX | Uri Shaked | 1 | -2/+5 | |
| 2019-11-19 | doc: add some comments | Uri Shaked | 1 | -0/+8 | |
| 2019-11-19 | feat: implement some AVR instructions + tests | Uri Shaked | 1 | -0/+501 | |
 |
index : avr8js | |
| Unnamed repository; edit this file 'description' to name the repository. | root |
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