aboutsummaryrefslogtreecommitdiff
path: root/src/cpu (unfollow)
Commit message (Expand)AuthorFilesLines
2025-02-11docs: add copyright notice to source codeUri Shaked5-1/+16
2025-02-11chore(deps): upgrade prettierUri Shaked2-5/+8
2025-02-11test: migrate tests from jest to vitestUri Shaked3-1/+4
2023-01-05chore(deps): upgrade typescript, jest, eslintUri Shaked1-3/+3
2022-04-30fix(cpu): don't clear RAM on reset #107Uri Shaked1-1/+0
2022-02-07style(instruction.spec): add comments for missing instruction tests and reord...Dudeplayz1-33/+103
2022-02-07test(instruction): add ADD, SUB and WDR unit testsDudeplayz1-0/+54
2022-01-20perf(cpu): speed up interruptsUri Shaked1-11/+28
2021-10-24fix(eeprom): EEPROM interrupt not firing #110Uri Shaked1-2/+3
2021-09-10refactor: remove the ICPU interfaceUri Shaked3-33/+18
2021-09-10feat(watchdog): implement watchdog timer #106Uri Shaked2-1/+12
2021-09-07fix(gpio): CBI/SBI handling in writes to PIN register #103Uri Shaked2-6/+8
2021-08-15feat(timer): external timer support #97Uri Shaked1-2/+1
2021-07-07feat(gpio): external interrupt/PCINT support (#82)Uri Shaked1-0/+2
2021-06-20perf(cpu): speed up event systemUri Shaked1-25/+47
2021-02-19feat(usart): implement RX #11Uri Shaked1-1/+2
2020-12-12perf(cpu): speed up event systemUri Shaked2-18/+59
2020-12-12test(cpu): fix implicit any errorUri Shaked1-3/+5
2020-12-12fix(cpu): event system issueUri Shaked2-2/+63
2020-12-09perf!: centeral timekeepingUri Shaked1-1/+44
2020-12-09refactor: central interrupt handling #38Uri Shaked1-3/+76
2020-12-09test(cpu): improve test nameUri Shaked1-1/+1
2020-09-30fix(cpu): incorrect address for RAMPZ / EINDUri Shaked2-8/+8
2020-09-02fix(interrupt): broken on ATmega2560Uri Shaked2-1/+23
2020-09-02fix(instruction): EICALL is brokenUri Shaked2-1/+3
2020-06-04test(instruction): extract constantsUri Shaked1-238/+274
2020-05-25feat(timer): Compare Match Output (#45)Uri Shaked1-0/+4
2020-04-29fix(timer): Reading TCNT in 2-cycle instructionsUri Shaked1-12/+12
2020-04-28fix(timer): incorrect high counter byte behaviorUri Shaked1-0/+8
2020-04-28fix(instruction): LD, ST instructions should take 2 clock cyclesUri Shaked2-20/+33
2020-04-09feat(instruction): 22-bit PC support #31Uri Shaked3-20/+119
2020-04-09feat(instruction): implement EICALL, EIJMP #31Uri Shaked2-0/+38
2020-04-08feat(instruction): implement ELPM #31Uri Shaked2-0/+71
2020-04-02test(instruction): use assembly in testsUri Shaked1-89/+91
2020-03-22refactor: added peripherals and cpu feature folderslironh6-0/+1687