| Commit message (Collapse) | Author | Files | Lines | ||
|---|---|---|---|---|---|
| 2022-01-20 | perf(cpu): speed up interrupts | Uri Shaked | 1 | -11/+28 | |
| code which makes heavy use of interrupts considerably slows down the simulator. E.g. that transmit programs large amount of data over SPI. See wokwi/wokwi-features#280 for an example. | |||||
| 2021-10-24 | fix(eeprom): EEPROM interrupt not firing #110 | Uri Shaked | 1 | -2/+3 | |
| fix #110 | |||||
| 2021-09-10 | refactor: remove the ICPU interface | Uri Shaked | 3 | -33/+18 | |
| Removing the interface simplifies the code | |||||
| 2021-09-10 | feat(watchdog): implement watchdog timer #106 | Uri Shaked | 2 | -1/+12 | |
| 2021-09-07 | fix(gpio): CBI/SBI handling in writes to PIN register #103 | Uri Shaked | 2 | -6/+8 | |
| fix #103 | |||||
| 2021-08-15 | feat(timer): external timer support #97 | Uri Shaked | 1 | -2/+1 | |
| also refactor timer/GPIO interaction to be more generic. close #97 | |||||
| 2021-07-07 | feat(gpio): external interrupt/PCINT support (#82) | Uri Shaked | 1 | -0/+2 | |
| close #70, #84 | |||||
| 2021-06-20 | perf(cpu): speed up event system | Uri Shaked | 1 | -25/+47 | |
| Use a linked list instead of array. This makes the simulator runs almost twice as fast in case of timers with prescaler of 1, e.g. when using the TVout library. In addition, we use a pool of clock event objects to avoid expensive GCs. | |||||
| 2021-02-19 | feat(usart): implement RX #11 | Uri Shaked | 1 | -1/+2 | |
| close #11 | |||||
| 2020-12-12 | perf(cpu): speed up event system | Uri Shaked | 2 | -18/+59 | |
| ditch `array.sort()` and instead manually keep the array sorted when we insert a new item. | |||||
| 2020-12-12 | test(cpu): fix implicit any error | Uri Shaked | 1 | -3/+5 | |
| 2020-12-12 | fix(cpu): event system issue | Uri Shaked | 2 | -2/+63 | |
| `updateClockEvent()` and `clearClockEvent()` would sometimes mess up the list of events. This could cause unexpected behavior when you have multiple timers running. Also added regression tests for these methods. | |||||
| 2020-12-09 | perf!: centeral timekeeping | Uri Shaked | 1 | -1/+44 | |
| This should improve performance, especially when running simulations with multiple peripherals. For instance, the demo project now runs at ~322%, up from ~185% in AVR8js 0.13.1. BREAKING CHANGE: `tick()` methods were removed from individual peripherals. You now need to call `cpu.tick()` instead. | |||||
| 2020-12-09 | refactor: central interrupt handling #38 | Uri Shaked | 1 | -3/+76 | |
| 2020-12-09 | test(cpu): improve test name | Uri Shaked | 1 | -1/+1 | |
| 2020-09-30 | fix(cpu): incorrect address for RAMPZ / EIND | Uri Shaked | 2 | -8/+8 | |
| We used their I/O space address intead of their data space address. close #61 | |||||
| 2020-09-02 | fix(interrupt): broken on ATmega2560 | Uri Shaked | 2 | -1/+23 | |
| close #58 | |||||
| 2020-09-02 | fix(instruction): EICALL is broken | Uri Shaked | 2 | -1/+3 | |
| close #59 | |||||
| 2020-06-04 | test(instruction): extract constants | Uri Shaked | 1 | -238/+274 | |
| This makes the test code easier to follow | |||||
| 2020-05-25 | feat(timer): Compare Match Output (#45) | Uri Shaked | 1 | -0/+4 | |
| The Compare Match Output bits are used to generate hardware PWM signals on selected MCU pins. This is also the mechanism used by Arduino's analogWrite() method. See #32 for more details | |||||
| 2020-04-29 | fix(timer): Reading TCNT in 2-cycle instructions | Uri Shaked | 1 | -12/+12 | |
| close #40 | |||||
| 2020-04-28 | fix(timer): incorrect high counter byte behavior | Uri Shaked | 1 | -0/+8 | |
| According to the datasheet, the value of the high byte of the counter for 16-bit timers (such as timer 1) is only updated when the low byte is being read/written. close #37 | |||||
| 2020-04-28 | fix(instruction): LD, ST instructions should take 2 clock cycles | Uri Shaked | 2 | -20/+33 | |
| close #39 | |||||
| 2020-04-09 | feat(instruction): 22-bit PC support #31 | Uri Shaked | 3 | -20/+119 | |
| adapt CALL, ICALL, RCALL, RET, and RETI for MCUs with 22-bit PC | |||||
| 2020-04-09 | feat(instruction): implement EICALL, EIJMP #31 | Uri Shaked | 2 | -0/+38 | |
| 2020-04-08 | feat(instruction): implement ELPM #31 | Uri Shaked | 2 | -0/+71 | |
| 2020-04-02 | test(instruction): use assembly in tests | Uri Shaked | 1 | -89/+91 | |
| Refactored the tests to use AVR assembly instead of hardcoded bytecode. This change should make the tests much easier to read and maintain. Before: loadProgram('659a'); Now: loadProgram('SBI 0x0c, 5'); | |||||
| 2020-03-22 | refactor: added peripherals and cpu feature folders | lironh | 6 | -0/+1687 | |
