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	Commit message (Collapse)	Author	Age	Files	Lines
*	fix(timer): Reading TCNT in 2-cycle instructions	Uri Shaked	2020-04-29	1	-12/+12
\| \| \| \|	close #40
*	fix(timer): incorrect high counter byte behavior	Uri Shaked	2020-04-28	1	-0/+8
\| \| \| \| \| \|	According to the datasheet, the value of the high byte of the counter for 16-bit timers (such as timer 1) is only updated when the low byte is being read/written. close #37
*	fix(instruction): LD, ST instructions should take 2 clock cycles	Uri Shaked	2020-04-28	2	-20/+33
\| \| \| \|	close #39
*	feat(instruction): 22-bit PC support #31	Uri Shaked	2020-04-09	3	-20/+119
\| \| \| \|	adapt CALL, ICALL, RCALL, RET, and RETI for MCUs with 22-bit PC
*	feat(instruction): implement EICALL, EIJMP #31	Uri Shaked	2020-04-09	2	-0/+38
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*	feat(instruction): implement ELPM #31	Uri Shaked	2020-04-08	2	-0/+71
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*	test(instruction): use assembly in tests	Uri Shaked	2020-04-02	1	-89/+91
\| \| \| \| \| \| \| \| \| \| \| \|	Refactored the tests to use AVR assembly instead of hardcoded bytecode. This change should make the tests much easier to read and maintain. Before: loadProgram('659a'); Now: loadProgram('SBI 0x0c, 5');
*	refactor: added peripherals and cpu feature folders	lironh	2020-03-22	6	-0/+1687