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* style(instruction.spec): add comments for missing instruction tests and ↵Dudeplayz2022-02-071-33/+103
| | | | reorder tests according to the AVR datasheet
* test(instruction): add ADD, SUB and WDR unit testsDudeplayz2022-02-071-0/+54
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* perf(cpu): speed up interruptsUri Shaked2022-01-201-11/+28
| | | | | | code which makes heavy use of interrupts considerably slows down the simulator. E.g. that transmit programs large amount of data over SPI. See wokwi/wokwi-features#280 for an example.
* fix(eeprom): EEPROM interrupt not firing #110Uri Shaked2021-10-241-2/+3
| | | | fix #110
* refactor: remove the ICPU interfaceUri Shaked2021-09-103-33/+18
| | | | Removing the interface simplifies the code
* feat(watchdog): implement watchdog timer #106Uri Shaked2021-09-102-1/+12
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* fix(gpio): CBI/SBI handling in writes to PIN register #103Uri Shaked2021-09-072-6/+8
| | | | fix #103
* feat(timer): external timer support #97Uri Shaked2021-08-151-2/+1
| | | | | | also refactor timer/GPIO interaction to be more generic. close #97
* feat(gpio): external interrupt/PCINT support (#82)Uri Shaked2021-07-071-0/+2
| | | close #70, #84
* perf(cpu): speed up event systemUri Shaked2021-06-201-25/+47
| | | | | | Use a linked list instead of array. This makes the simulator runs almost twice as fast in case of timers with prescaler of 1, e.g. when using the TVout library. In addition, we use a pool of clock event objects to avoid expensive GCs.
* feat(usart): implement RX #11Uri Shaked2021-02-191-1/+2
| | | | close #11
* perf(cpu): speed up event systemUri Shaked2020-12-122-18/+59
| | | | ditch `array.sort()` and instead manually keep the array sorted when we insert a new item.
* test(cpu): fix implicit any errorUri Shaked2020-12-121-3/+5
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* fix(cpu): event system issueUri Shaked2020-12-122-2/+63
| | | | | | | `updateClockEvent()` and `clearClockEvent()` would sometimes mess up the list of events. This could cause unexpected behavior when you have multiple timers running. Also added regression tests for these methods.
* perf!: centeral timekeepingUri Shaked2020-12-091-1/+44
| | | | | | | | | This should improve performance, especially when running simulations with multiple peripherals. For instance, the demo project now runs at ~322%, up from ~185% in AVR8js 0.13.1. BREAKING CHANGE: `tick()` methods were removed from individual peripherals. You now need to call `cpu.tick()` instead.
* refactor: central interrupt handling #38Uri Shaked2020-12-091-3/+76
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* test(cpu): improve test nameUri Shaked2020-12-091-1/+1
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* fix(cpu): incorrect address for RAMPZ / EINDUri Shaked2020-09-302-8/+8
| | | | | | We used their I/O space address intead of their data space address. close #61
* fix(interrupt): broken on ATmega2560Uri Shaked2020-09-022-1/+23
| | | | close #58
* fix(instruction): EICALL is brokenUri Shaked2020-09-022-1/+3
| | | | close #59
* test(instruction): extract constantsUri Shaked2020-06-041-238/+274
| | | | This makes the test code easier to follow
* feat(timer): Compare Match Output (#45)Uri Shaked2020-05-251-0/+4
| | | | | The Compare Match Output bits are used to generate hardware PWM signals on selected MCU pins. This is also the mechanism used by Arduino's analogWrite() method. See #32 for more details
* fix(timer): Reading TCNT in 2-cycle instructionsUri Shaked2020-04-291-12/+12
| | | | close #40
* fix(timer): incorrect high counter byte behaviorUri Shaked2020-04-281-0/+8
| | | | | | According to the datasheet, the value of the high byte of the counter for 16-bit timers (such as timer 1) is only updated when the low byte is being read/written. close #37
* fix(instruction): LD, ST instructions should take 2 clock cyclesUri Shaked2020-04-282-20/+33
| | | | close #39
* feat(instruction): 22-bit PC support #31Uri Shaked2020-04-093-20/+119
| | | | adapt CALL, ICALL, RCALL, RET, and RETI for MCUs with 22-bit PC
* feat(instruction): implement EICALL, EIJMP #31Uri Shaked2020-04-092-0/+38
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* feat(instruction): implement ELPM #31Uri Shaked2020-04-082-0/+71
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* test(instruction): use assembly in testsUri Shaked2020-04-021-89/+91
| | | | | | | | | | | | Refactored the tests to use AVR assembly instead of hardcoded bytecode. This change should make the tests much easier to read and maintain. Before: loadProgram('659a'); Now: loadProgram('SBI 0x0c, 5');
* refactor: added peripherals and cpu feature folderslironh2020-03-226-0/+1687
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