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	Commit message (Collapse)	Author	Files	Lines
2020-04-28	fix(timer): incorrect high counter byte behavior	Uri Shaked	1	-23/+70
	According to the datasheet, the value of the high byte of the counter for 16-bit timers (such as timer 1) is only updated when the low byte is being read/written. close #37
2020-04-27	style: reformat code with prettier 2.x	Uri Shaked	1	-1/+1
	prettier rules have changed since we upgraded to 2.x
2020-04-27	fix(timer): Timer value should not increment on the same cycle as TCNTn write	Uri Shaked	1	-0/+40
	close #36
2020-04-12	test(timer): add more 16-bit timer tests	Uri Shaked	1	-3/+46
	also fix some issues found by @gfeun and the tests
2020-04-12	feat(timer): implement 16-bit timers	Uri Shaked	1	-1/+18
	e.g. Timer/Counter1 on ATmega328
2020-03-22	refactor: added peripherals and cpu feature folders	lironh	1	-1/+1

2019-11-30	fix: Wrong prescaler for Timer2	Uri Shaked	1	-1/+14
	fix #5
2019-11-30	feat: Output Compare for Timers	Uri Shaked	1	-0/+107
	close #4
2019-11-21	feat: initial timer implementation	Uri Shaked	1	-0/+84
	8-bit timers basic functionality + tests: 1. basic counting + prescaler 2. timer overflow 3. timer overflow interrupt