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2020-05-04fix(timer): stop Timer 2 when all CS bits are 0Uri Shaked1-1/+1
close #44
2020-04-29fix(timer): Reading TCNT in 2-cycle instructionsUri Shaked1-0/+1
close #40
2020-04-28fix(timer): incorrect high counter byte behaviorUri Shaked1-23/+19
According to the datasheet, the value of the high byte of the counter for 16-bit timers (such as timer 1) is only updated when the low byte is being read/written. close #37
2020-04-27style: reformat code with prettier 2.xUri Shaked1-10/+10
prettier rules have changed since we upgraded to 2.x
2020-04-27fix(timer): Timer value should not increment on the same cycle as TCNTn writeUri Shaked1-2/+8
close #36
2020-04-12test(timer): add more 16-bit timer testsUri Shaked1-10/+10
also fix some issues found by @gfeun and the tests
2020-04-12feat(timer): implement 16-bit timersUri Shaked1-23/+130
e.g. Timer/Counter1 on ATmega328
2020-03-22refactor: added peripherals and cpu feature folderslironh1-2/+2
2019-12-07refactor: tslint → eslintUri Shaked1-2/+2
2019-11-30fix: Wrong prescaler for Timer2Uri Shaked1-5/+30
fix #5
2019-11-30feat: Output Compare for TimersUri Shaked1-6/+78
close #4
2019-11-21feat: initial timer implementationUri Shaked1-0/+147
8-bit timers basic functionality + tests: 1. basic counting + prescaler 2. timer overflow 3. timer overflow interrupt