aboutsummaryrefslogtreecommitdiff
path: root/src/peripherals/timer.ts (follow)
Commit message (Collapse)AuthorAgeFilesLines
* fix(timer): Phase Correct mode overruns #119Uri Shaked2022-03-221-2/+15
|
* fix(timer): OCRH masking #117Uri Shaked2022-02-211-3/+18
|
* fix(timer): setting TCNT doesn't update OCRA #111Uri Shaked2021-10-291-0/+8
|
* feat(timer): Force Output Compare (FOC) bitsUri Shaked2021-10-071-0/+34
|
* feat(timer): 3rd output compare (OCRnC) #96Uri Shaked2021-09-141-13/+96
|
* feat(timer): external timer support #97Uri Shaked2021-08-151-16/+50
| | | | | | also refactor timer/GPIO interaction to be more generic. close #97
* fix(timer): only set ICR hook for 16-bit timersUri Shaked2021-07-071-3/+3
| | | | The ICR (Input Capture Register) only exists for 16-bit timers.
* fix(timer): Timer1 PWM issues #94Uri Shaked2021-06-191-2/+2
| | | | close #94
* fix(timer): delay() is inaccurate #81Uri Shaked2020-12-291-8/+1
| | | | fix #81
* fix(timer): Output Compare in PWM modes #78Uri Shaked2020-12-271-56/+110
| | | | close #78
* fix(timer): Overflow interrupt fires twice #80Uri Shaked2020-12-261-1/+5
| | | | fix #80
* fix(timer): Output Compare sometimes misses Compare Match #79Uri Shaked2020-12-251-6/+14
| | | | fix #79
* fix(timer): Output Compare issue #74Uri Shaked2020-12-211-4/+5
| | | | | | output compare doesn't work when the OCR register (OCRnA/OCRnB) equals to 0 fix #74
* fix(timer): TOV flag does not update correctly #75Uri Shaked2020-12-201-17/+21
| | | | fix #75
* fix(timer): OCR values should be buffered #76Uri Shaked2020-12-201-6/+33
| | | | fix #76
* fix(timer): Incorrect count when stopping a timerUri Shaked2020-12-121-14/+21
| | | | fix #72
* perf!: centeral timekeepingUri Shaked2020-12-091-5/+25
| | | | | | | | | This should improve performance, especially when running simulations with multiple peripherals. For instance, the demo project now runs at ~322%, up from ~185% in AVR8js 0.13.1. BREAKING CHANGE: `tick()` methods were removed from individual peripherals. You now need to call `cpu.tick()` instead.
* refactor: central interrupt handling #38Uri Shaked2020-12-091-36/+42
|
* feat: Support for simulating ATtinyx5 (e.g. ATtiny85) timers #64Uri Shaked2020-11-141-12/+33
| | | | close #64
* fix: AVRTimerConfig interface not exported #65Uri Shaked2020-11-141-1/+1
| | | | close #65
* perf(timer): speed up interrupt handlingUri Shaked2020-09-021-1/+4
|
* perf(timer): improve timer speedUri Shaked2020-09-021-2/+5
| | | | cache the value of the clock divider
* fix(timer): keeps counting even when stopped #41Uri Shaked2020-08-011-0/+2
|
* perf(timer): improve tick() performanceUri Shaked2020-05-251-3/+4
| | | | reduce the number of calls to TIFR/TIMSK getters
* feat(timer): Compare Match Output (#45)Uri Shaked2020-05-251-32/+141
| | | | | The Compare Match Output bits are used to generate hardware PWM signals on selected MCU pins. This is also the mechanism used by Arduino's analogWrite() method. See #32 for more details
* fix(timer): stop Timer 2 when all CS bits are 0Uri Shaked2020-05-041-1/+1
| | | | close #44
* fix(timer): Reading TCNT in 2-cycle instructionsUri Shaked2020-04-291-0/+1
| | | | close #40
* fix(timer): incorrect high counter byte behaviorUri Shaked2020-04-281-23/+19
| | | | | | According to the datasheet, the value of the high byte of the counter for 16-bit timers (such as timer 1) is only updated when the low byte is being read/written. close #37
* style: reformat code with prettier 2.xUri Shaked2020-04-271-10/+10
| | | | prettier rules have changed since we upgraded to 2.x
* fix(timer): Timer value should not increment on the same cycle as TCNTn writeUri Shaked2020-04-271-2/+8
| | | | close #36
* test(timer): add more 16-bit timer testsUri Shaked2020-04-121-10/+10
| | | | also fix some issues found by @gfeun and the tests
* feat(timer): implement 16-bit timersUri Shaked2020-04-121-23/+130
| | | | e.g. Timer/Counter1 on ATmega328
* refactor: added peripherals and cpu feature folderslironh2020-03-221-0/+244
generated by cgit v1.2.3 (git 2.25.1) at 2026-03-31 20:37:05 +0000