| Commit message (Expand) | Author | Files | Lines | |
|---|---|---|---|---|
| 2020-12-09 | perf!: centeral timekeeping | Uri Shaked | 1 | -11/+5 |
| 2020-12-09 | refactor: central interrupt handling #38 | Uri Shaked | 1 | -0/+6 |
| 2020-11-27 | fix(usart): respect the given baud rate #16 | Uri Shaked | 1 | -39/+97 |
| 2020-07-09 | fix(usart): bitsPerChar looking at the wrong register | Uri Shaked | 1 | -6/+9 |
| 2020-07-09 | fix(usart): TXC interrupt triggered incorrectly | Uri Shaked | 1 | -3/+17 |
| 2020-07-09 | test(usart): extract constants | Uri Shaked | 1 | -49/+68 |
| 2020-03-22 | refactor: added peripherals and cpu feature folders | lironh | 1 | -1/+1 |
| 2019-12-07 | refactor: tslint → eslint | Uri Shaked | 1 | -1/+1 |
| 2019-12-07 | feat(usart): add onLineTransmit callback | Uri Shaked | 1 | -0/+43 |
| 2019-12-07 | test(usart): more USART tests | Uri Shaked | 1 | -0/+56 |
| 2019-12-01 | feat: initial implementation of USART | Uri Shaked | 1 | -0/+60 |
