avr8js - Unnamed repository; edit this file 'description' to name the repository.

	Commit message (Expand)	Author	Files	Lines
2020-10-07	fix(gpio): Changing pinMode from `INPUT` to `INPUT_PULLUP` doesn't trigger li...	Uri Shaked	2	-4/+13
2020-09-02	perf(timer): speed up interrupt handling	Uri Shaked	1	-1/+4
2020-09-02	perf(timer): improve timer speed	Uri Shaked	2	-11/+17
2020-08-22	style(spi): remove redundant eslint comments	Uri Shaked	1	-2/+0
2020-08-22	feat(spi): implement SPI master #33	Uri Shaked	2	-0/+351
2020-08-22	test(eeprom): remove useless line	Uri Shaked	1	-1/+0
2020-08-01	fix(timer): keeps counting even when stopped #41	Uri Shaked	2	-36/+51
2020-08-01	test(timer): use TestProgramRunner	Uri Shaked	2	-134/+127
2020-07-16	fix(eeprom): EEPROM write fails after first attempt	Uri Shaked	2	-1/+33
2020-07-16	feat(eeprom): implement EEPROM peripheral	Uri Shaked	3	-41/+369
2020-07-16	test(timer): remove stray console.log	Uri Shaked	1	-1/+0
2020-07-16	test(twi): extract constants	Uri Shaked	1	-31/+46
2020-07-09	fix(usart): bitsPerChar looking at the wrong register	Uri Shaked	2	-7/+10
2020-07-09	fix(usart): TXC interrupt triggered incorrectly	Uri Shaked	2	-4/+18
2020-07-09	test(usart): extract constants	Uri Shaked	1	-49/+68
2020-05-30	test(timer): extract constants	Uri Shaked	1	-133/+185
2020-05-29	fix(gpio): port state not updated on DDR write	Uri Shaked	2	-0/+15
2020-05-25	perf(timer): improve tick() performance	Uri Shaked	1	-3/+4
2020-05-25	feat(timer): Compare Match Output (#45)	Uri Shaked	3	-57/+338
2020-05-10	feat(gpio): add setPin() function	Uri Shaked	2	-0/+43
2020-05-04	fix(timer): stop Timer 2 when all CS bits are 0	Uri Shaked	1	-1/+1
2020-04-29	fix(timer): Reading TCNT in 2-cycle instructions	Uri Shaked	2	-4/+23
2020-04-28	fix(timer): incorrect high counter byte behavior	Uri Shaked	2	-46/+89
2020-04-27	style: reformat code with prettier 2.x	Uri Shaked	6	-27/+27
2020-04-27	fix(timer): Timer value should not increment on the same cycle as TCNTn write	Uri Shaked	2	-2/+48
2020-04-12	test(timer): add more 16-bit timer tests	Uri Shaked	2	-13/+56
2020-04-12	feat(timer): implement 16-bit timers	Uri Shaked	2	-24/+148
2020-04-02	fix: GPIO port listeners not invoked when writing to DDR registers	Uri Shaked	2	-3/+17
2020-03-22	refactor: added peripherals and cpu feature folders	lironh	8	-0/+1566