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2021-06-19fix(timer): Timer1 PWM issues #94Uri Shaked2-2/+24
close #94
2021-04-15fix(twi): broken repeated start #91Uri Shaked2-1/+26
fix #91
2021-02-19feat(usart): implement RX #11Uri Shaked3-6/+97
close #11
2021-01-02fix: typo in parameter nameUri Shaked3-6/+6
freqMHz → freqHz in SPI, TWI, and USART: they all expect the frequency in hertz, not mega-hertz.
2020-12-29fix(timer): delay() is inaccurate #81Uri Shaked2-21/+26
fix #81
2020-12-27fix(timer): Output Compare in PWM modes #78Uri Shaked3-59/+325
close #78
2020-12-26fix(timer): Overflow interrupt fires twice #80Uri Shaked2-7/+45
fix #80
2020-12-25fix(timer): Output Compare sometimes misses Compare Match #79Uri Shaked2-6/+45
fix #79
2020-12-21fix(timer): Output Compare issue #74Uri Shaked2-10/+28
output compare doesn't work when the OCR register (OCRnA/OCRnB) equals to 0 fix #74
2020-12-20fix(timer): TOV flag does not update correctly #75Uri Shaked2-20/+56
fix #75
2020-12-20fix(timer): OCR values should be buffered #76Uri Shaked2-11/+125
fix #76
2020-12-12fix(timer): Incorrect count when stopping a timerUri Shaked2-18/+41
fix #72
2020-12-09perf!: centeral timekeepingUri Shaked10-211/+173
This should improve performance, especially when running simulations with multiple peripherals. For instance, the demo project now runs at ~322%, up from ~185% in AVR8js 0.13.1. BREAKING CHANGE: `tick()` methods were removed from individual peripherals. You now need to call `cpu.tick()` instead.
2020-12-09refactor: central interrupt handling #38Uri Shaked10-89/+208
2020-11-27fix(usart): respect the given baud rate #16Uri Shaked2-54/+150
close #16
2020-11-25feat(clock): Clock Prescale (CLKPR) support #68Uri Shaked2-0/+184
close #68
2020-11-14feat: Support for simulating ATtinyx5 (e.g. ATtiny85) timers #64Uri Shaked2-12/+60
close #64
2020-11-14fix: AVRTimerConfig interface not exported #65Uri Shaked1-1/+1
close #65
2020-10-07test(gpio): extract constantsUri Shaked1-26/+30
2020-10-07fix(gpio): Changing pinMode from `INPUT` to `INPUT_PULLUP` doesn't trigger ↵Uri Shaked2-4/+13
listeners close #62
2020-09-02perf(timer): speed up interrupt handlingUri Shaked1-1/+4
2020-09-02perf(timer): improve timer speedUri Shaked2-11/+17
cache the value of the clock divider
2020-08-22style(spi): remove redundant eslint commentsUri Shaked1-2/+0
2020-08-22feat(spi): implement SPI master #33Uri Shaked2-0/+351
close #33
2020-08-22test(eeprom): remove useless lineUri Shaked1-1/+0
2020-08-01fix(timer): keeps counting even when stopped #41Uri Shaked2-36/+51
2020-08-01test(timer): use TestProgramRunnerUri Shaked2-134/+127
2020-07-16fix(eeprom): EEPROM write fails after first attemptUri Shaked2-1/+33
close #54
2020-07-16feat(eeprom): implement EEPROM peripheralUri Shaked3-41/+369
close #15
2020-07-16test(timer): remove stray console.logUri Shaked1-1/+0
2020-07-16test(twi): extract constantsUri Shaked1-31/+46
This makes the test code more readable
2020-07-09fix(usart): bitsPerChar looking at the wrong registerUri Shaked2-7/+10
close #52
2020-07-09fix(usart): TXC interrupt triggered incorrectlyUri Shaked2-4/+18
close #51
2020-07-09test(usart): extract constantsUri Shaked1-49/+68
This makes the test code easier to read
2020-05-30test(timer): extract constantsUri Shaked1-133/+185
This makes the test code easier to follow
2020-05-29fix(gpio): port state not updated on DDR writeUri Shaked2-0/+15
Calling `pinState()` inside a GPIO port listener returns incorrect values after changing DDR close #47
2020-05-25perf(timer): improve tick() performanceUri Shaked1-3/+4
reduce the number of calls to TIFR/TIMSK getters
2020-05-25feat(timer): Compare Match Output (#45)Uri Shaked3-57/+338
The Compare Match Output bits are used to generate hardware PWM signals on selected MCU pins. This is also the mechanism used by Arduino's analogWrite() method. See #32 for more details
2020-05-10feat(gpio): add setPin() functionUri Shaked2-0/+43
close #26
2020-05-04fix(timer): stop Timer 2 when all CS bits are 0Uri Shaked1-1/+1
close #44
2020-04-29fix(timer): Reading TCNT in 2-cycle instructionsUri Shaked2-4/+23
close #40
2020-04-28fix(timer): incorrect high counter byte behaviorUri Shaked2-46/+89
According to the datasheet, the value of the high byte of the counter for 16-bit timers (such as timer 1) is only updated when the low byte is being read/written. close #37
2020-04-27style: reformat code with prettier 2.xUri Shaked6-27/+27
prettier rules have changed since we upgraded to 2.x
2020-04-27fix(timer): Timer value should not increment on the same cycle as TCNTn writeUri Shaked2-2/+48
close #36
2020-04-12test(timer): add more 16-bit timer testsUri Shaked2-13/+56
also fix some issues found by @gfeun and the tests
2020-04-12feat(timer): implement 16-bit timersUri Shaked2-24/+148
e.g. Timer/Counter1 on ATmega328
2020-04-02fix: GPIO port listeners not invoked when writing to DDR registersUri Shaked2-3/+17
close #28
2020-03-22refactor: added peripherals and cpu feature folderslironh8-0/+1566
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