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* test: migrate tests from jest to vitestUri Shaked2025-02-119-50/+59
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* chore(deps): upgrade typescript, jest, eslintUri Shaked2023-01-051-1/+1
| | | | also upgrade related dependencies: ts-node, ts-jest
* chore: update copyright yearsUri Shaked2023-01-051-1/+1
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* fix(gpio): INT0 broken on ATtiny85Uri Shaked2023-01-051-18/+21
| | | | make the ISCx0/ISCx1 bit offsets part of the `AVRExternalInterrupt` configuration object.
* feat(usi): ATtiny85 USI implementationUri Shaked2022-05-172-2/+129
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* fix(timer): Phase Correct mode overruns #119Uri Shaked2022-03-222-2/+67
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* fix(timer): OCRH masking #117Uri Shaked2022-02-212-3/+29
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* test(watchdog): more robust testsUri Shaked2022-02-071-0/+2
| | | | add assertions, fix #115
* fix(twi): fails on repeated start conditionUri Shaked2021-12-131-1/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | reproduction: https://wokwi.com/arduino/projects/306115576172905024 minimal reproduction code: ```cpp #include <Wire.h> void setup() { Serial.begin(115200); Wire.begin(); Wire.beginTransmission(0x68); Wire.write( 0x3B); Wire.endTransmission( false); // <---- Fails after this auto n = Wire.requestFrom(0x68, 6); if (n == 6) { int16_t AcX = Wire.read() << 8 | Wire.read(); // 0x3B (ACCEL_XOUT_H) & 0x3C (ACCEL_XOUT_L) int16_t AcY = Wire.read() << 8 | Wire.read(); // 0x3D (ACCEL_YOUT_H) & 0x3E (ACCEL_YOUT_L) int16_t AcZ = Wire.read() << 8 | Wire.read(); // 0x3F (ACCEL_ZOUT_H) & 0x40 (ACCEL_ZOUT_L) Serial.print( "AcX = "); Serial.print( AcX); Serial.print( " | AcY = "); Serial.print( AcY); Serial.print( " | AcZ = "); Serial.print( AcZ); Serial.println(); } else { Serial.println( "--------- ERROR ---------"); } } void loop() {} ```
* feat(spi): add `onByte` callbackUri Shaked2021-10-302-19/+44
| | | | | | a more versatile alternative to the `onTransfer` callback. Depracate `onTransfer()`.
* fix(timer): setting TCNT doesn't update OCRA #111Uri Shaked2021-10-292-0/+44
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* fix(eeprom): EEPROM interrupt not firing #110Uri Shaked2021-10-242-3/+32
| | | | fix #110
* fix(spi): setting SPIE doesn't fire pending interruptUri Shaked2021-10-222-0/+25
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* feat(timer): Force Output Compare (FOC) bitsUri Shaked2021-10-072-5/+98
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* feat(timer): 3rd output compare (OCRnC) #96Uri Shaked2021-09-142-13/+170
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* feat(adc): ADC peripheral #13Uri Shaked2021-09-102-0/+395
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* feat(watchdog): implement watchdog timer #106Uri Shaked2021-09-102-0/+344
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* fix(gpio): CBI/SBI handling in writes to PIN register #103Uri Shaked2021-09-072-2/+42
| | | | fix #103
* feat(timer): external timer support #97Uri Shaked2021-08-154-93/+170
| | | | | | also refactor timer/GPIO interaction to be more generic. close #97
* chore(deps): prettier 2.3.2Uri Shaked2021-08-151-16/+2
| | | | also reformat all the code with the new version
* fix(gpio): timer outputs not reflected in PIN register #102Uri Shaked2021-08-132-8/+22
| | | | fix #102
* fix(gpio): PWM may leaves pins in high stateUri Shaked2021-08-091-0/+1
| | | | Disabling PWM when a GPIO pin is high will cause the pin to get stuck in high state.
* style(spi): remove redundant whitespace from commentsUri Shaked2021-08-071-2/+2
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* feat(usart): add `immediate` parameter to writeByte()Uri Shaked2021-07-171-8/+12
| | | | The value will be available immediately to the user program instead of waiting one symbol time before making it available.
* fix(usart): tx / rx complete timingUri Shaked2021-07-161-1/+1
| | | | fix the calculation of cyclesPerChar, which is used to determine when a USART RX/TX operation is marked complete.
* feat(usart): add configuration change eventUri Shaked2021-07-152-3/+95
| | | | also add `txEnable` and `rxEnable` properties
* fix(timer): only set ICR hook for 16-bit timersUri Shaked2021-07-071-3/+3
| | | | The ICR (Input Capture Register) only exists for 16-bit timers.
* feat(gpio): external interrupt/PCINT support (#82)Uri Shaked2021-07-072-18/+450
| | | close #70, #84
* fix(timer): Timer1 PWM issues #94Uri Shaked2021-06-192-2/+24
| | | | close #94
* fix(twi): broken repeated start #91Uri Shaked2021-04-152-1/+26
| | | | fix #91
* feat(usart): implement RX #11Uri Shaked2021-02-193-6/+97
| | | | close #11
* fix: typo in parameter nameUri Shaked2021-01-023-6/+6
| | | | | freqMHz → freqHz in SPI, TWI, and USART: they all expect the frequency in hertz, not mega-hertz.
* fix(timer): delay() is inaccurate #81Uri Shaked2020-12-292-21/+26
| | | | fix #81
* fix(timer): Output Compare in PWM modes #78Uri Shaked2020-12-273-59/+325
| | | | close #78
* fix(timer): Overflow interrupt fires twice #80Uri Shaked2020-12-262-7/+45
| | | | fix #80
* fix(timer): Output Compare sometimes misses Compare Match #79Uri Shaked2020-12-252-6/+45
| | | | fix #79
* fix(timer): Output Compare issue #74Uri Shaked2020-12-212-10/+28
| | | | | | output compare doesn't work when the OCR register (OCRnA/OCRnB) equals to 0 fix #74
* fix(timer): TOV flag does not update correctly #75Uri Shaked2020-12-202-20/+56
| | | | fix #75
* fix(timer): OCR values should be buffered #76Uri Shaked2020-12-202-11/+125
| | | | fix #76
* fix(timer): Incorrect count when stopping a timerUri Shaked2020-12-122-18/+41
| | | | fix #72
* perf!: centeral timekeepingUri Shaked2020-12-0910-211/+173
| | | | | | | | | This should improve performance, especially when running simulations with multiple peripherals. For instance, the demo project now runs at ~322%, up from ~185% in AVR8js 0.13.1. BREAKING CHANGE: `tick()` methods were removed from individual peripherals. You now need to call `cpu.tick()` instead.
* refactor: central interrupt handling #38Uri Shaked2020-12-0910-89/+208
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* fix(usart): respect the given baud rate #16Uri Shaked2020-11-272-54/+150
| | | | close #16
* feat(clock): Clock Prescale (CLKPR) support #68Uri Shaked2020-11-252-0/+184
| | | | close #68
* feat: Support for simulating ATtinyx5 (e.g. ATtiny85) timers #64Uri Shaked2020-11-142-12/+60
| | | | close #64
* fix: AVRTimerConfig interface not exported #65Uri Shaked2020-11-141-1/+1
| | | | close #65
* test(gpio): extract constantsUri Shaked2020-10-071-26/+30
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* fix(gpio): Changing pinMode from `INPUT` to `INPUT_PULLUP` doesn't trigger ↵Uri Shaked2020-10-072-4/+13
| | | | | | listeners close #62
* perf(timer): speed up interrupt handlingUri Shaked2020-09-021-1/+4
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* perf(timer): improve timer speedUri Shaked2020-09-022-11/+17
| | | | cache the value of the clock divider
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