| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | fix(timer): only set ICR hook for 16-bit timers | Uri Shaked | 2021-07-07 | 1 | -3/+3 |
| | | | | | The ICR (Input Capture Register) only exists for 16-bit timers. | ||||
| * | feat(gpio): external interrupt/PCINT support (#82) | Uri Shaked | 2021-07-07 | 2 | -18/+450 |
| | | | | close #70, #84 | ||||
| * | fix(timer): Timer1 PWM issues #94 | Uri Shaked | 2021-06-19 | 2 | -2/+24 |
| | | | | | close #94 | ||||
| * | fix(twi): broken repeated start #91 | Uri Shaked | 2021-04-15 | 2 | -1/+26 |
| | | | | | fix #91 | ||||
| * | feat(usart): implement RX #11 | Uri Shaked | 2021-02-19 | 3 | -6/+97 |
| | | | | | close #11 | ||||
| * | fix: typo in parameter name | Uri Shaked | 2021-01-02 | 3 | -6/+6 |
| | | | | | | freqMHz → freqHz in SPI, TWI, and USART: they all expect the frequency in hertz, not mega-hertz. | ||||
| * | fix(timer): delay() is inaccurate #81 | Uri Shaked | 2020-12-29 | 2 | -21/+26 |
| | | | | | fix #81 | ||||
| * | fix(timer): Output Compare in PWM modes #78 | Uri Shaked | 2020-12-27 | 3 | -59/+325 |
| | | | | | close #78 | ||||
| * | fix(timer): Overflow interrupt fires twice #80 | Uri Shaked | 2020-12-26 | 2 | -7/+45 |
| | | | | | fix #80 | ||||
| * | fix(timer): Output Compare sometimes misses Compare Match #79 | Uri Shaked | 2020-12-25 | 2 | -6/+45 |
| | | | | | fix #79 | ||||
| * | fix(timer): Output Compare issue #74 | Uri Shaked | 2020-12-21 | 2 | -10/+28 |
| | | | | | | | output compare doesn't work when the OCR register (OCRnA/OCRnB) equals to 0 fix #74 | ||||
| * | fix(timer): TOV flag does not update correctly #75 | Uri Shaked | 2020-12-20 | 2 | -20/+56 |
| | | | | | fix #75 | ||||
| * | fix(timer): OCR values should be buffered #76 | Uri Shaked | 2020-12-20 | 2 | -11/+125 |
| | | | | | fix #76 | ||||
| * | fix(timer): Incorrect count when stopping a timer | Uri Shaked | 2020-12-12 | 2 | -18/+41 |
| | | | | | fix #72 | ||||
| * | perf!: centeral timekeeping | Uri Shaked | 2020-12-09 | 10 | -211/+173 |
| | | | | | | | | | | This should improve performance, especially when running simulations with multiple peripherals. For instance, the demo project now runs at ~322%, up from ~185% in AVR8js 0.13.1. BREAKING CHANGE: `tick()` methods were removed from individual peripherals. You now need to call `cpu.tick()` instead. | ||||
| * | refactor: central interrupt handling #38 | Uri Shaked | 2020-12-09 | 10 | -89/+208 |
| | | |||||
| * | fix(usart): respect the given baud rate #16 | Uri Shaked | 2020-11-27 | 2 | -54/+150 |
| | | | | | close #16 | ||||
| * | feat(clock): Clock Prescale (CLKPR) support #68 | Uri Shaked | 2020-11-25 | 2 | -0/+184 |
| | | | | | close #68 | ||||
| * | feat: Support for simulating ATtinyx5 (e.g. ATtiny85) timers #64 | Uri Shaked | 2020-11-14 | 2 | -12/+60 |
| | | | | | close #64 | ||||
| * | fix: AVRTimerConfig interface not exported #65 | Uri Shaked | 2020-11-14 | 1 | -1/+1 |
| | | | | | close #65 | ||||
| * | test(gpio): extract constants | Uri Shaked | 2020-10-07 | 1 | -26/+30 |
| | | |||||
| * | fix(gpio): Changing pinMode from `INPUT` to `INPUT_PULLUP` doesn't trigger ↵ | Uri Shaked | 2020-10-07 | 2 | -4/+13 |
| | | | | | | | listeners close #62 | ||||
| * | perf(timer): speed up interrupt handling | Uri Shaked | 2020-09-02 | 1 | -1/+4 |
| | | |||||
| * | perf(timer): improve timer speed | Uri Shaked | 2020-09-02 | 2 | -11/+17 |
| | | | | | cache the value of the clock divider | ||||
| * | style(spi): remove redundant eslint comments | Uri Shaked | 2020-08-22 | 1 | -2/+0 |
| | | |||||
| * | feat(spi): implement SPI master #33 | Uri Shaked | 2020-08-22 | 2 | -0/+351 |
| | | | | | close #33 | ||||
| * | test(eeprom): remove useless line | Uri Shaked | 2020-08-22 | 1 | -1/+0 |
| | | |||||
| * | fix(timer): keeps counting even when stopped #41 | Uri Shaked | 2020-08-01 | 2 | -36/+51 |
| | | |||||
| * | test(timer): use TestProgramRunner | Uri Shaked | 2020-08-01 | 2 | -134/+127 |
| | | |||||
| * | fix(eeprom): EEPROM write fails after first attempt | Uri Shaked | 2020-07-16 | 2 | -1/+33 |
| | | | | | close #54 | ||||
| * | feat(eeprom): implement EEPROM peripheral | Uri Shaked | 2020-07-16 | 3 | -41/+369 |
| | | | | | close #15 | ||||
| * | test(timer): remove stray console.log | Uri Shaked | 2020-07-16 | 1 | -1/+0 |
| | | |||||
| * | test(twi): extract constants | Uri Shaked | 2020-07-16 | 1 | -31/+46 |
| | | | | | This makes the test code more readable | ||||
| * | fix(usart): bitsPerChar looking at the wrong register | Uri Shaked | 2020-07-09 | 2 | -7/+10 |
| | | | | | close #52 | ||||
| * | fix(usart): TXC interrupt triggered incorrectly | Uri Shaked | 2020-07-09 | 2 | -4/+18 |
| | | | | | close #51 | ||||
| * | test(usart): extract constants | Uri Shaked | 2020-07-09 | 1 | -49/+68 |
| | | | | | This makes the test code easier to read | ||||
| * | test(timer): extract constants | Uri Shaked | 2020-05-30 | 1 | -133/+185 |
| | | | | | This makes the test code easier to follow | ||||
| * | fix(gpio): port state not updated on DDR write | Uri Shaked | 2020-05-29 | 2 | -0/+15 |
| | | | | | | | Calling `pinState()` inside a GPIO port listener returns incorrect values after changing DDR close #47 | ||||
| * | perf(timer): improve tick() performance | Uri Shaked | 2020-05-25 | 1 | -3/+4 |
| | | | | | reduce the number of calls to TIFR/TIMSK getters | ||||
| * | feat(timer): Compare Match Output (#45) | Uri Shaked | 2020-05-25 | 3 | -57/+338 |
| | | | | | | The Compare Match Output bits are used to generate hardware PWM signals on selected MCU pins. This is also the mechanism used by Arduino's analogWrite() method. See #32 for more details | ||||
| * | feat(gpio): add setPin() function | Uri Shaked | 2020-05-10 | 2 | -0/+43 |
| | | | | | close #26 | ||||
| * | fix(timer): stop Timer 2 when all CS bits are 0 | Uri Shaked | 2020-05-04 | 1 | -1/+1 |
| | | | | | close #44 | ||||
| * | fix(timer): Reading TCNT in 2-cycle instructions | Uri Shaked | 2020-04-29 | 2 | -4/+23 |
| | | | | | close #40 | ||||
| * | fix(timer): incorrect high counter byte behavior | Uri Shaked | 2020-04-28 | 2 | -46/+89 |
| | | | | | | | According to the datasheet, the value of the high byte of the counter for 16-bit timers (such as timer 1) is only updated when the low byte is being read/written. close #37 | ||||
| * | style: reformat code with prettier 2.x | Uri Shaked | 2020-04-27 | 6 | -27/+27 |
| | | | | | prettier rules have changed since we upgraded to 2.x | ||||
| * | fix(timer): Timer value should not increment on the same cycle as TCNTn write | Uri Shaked | 2020-04-27 | 2 | -2/+48 |
| | | | | | close #36 | ||||
| * | test(timer): add more 16-bit timer tests | Uri Shaked | 2020-04-12 | 2 | -13/+56 |
| | | | | | also fix some issues found by @gfeun and the tests | ||||
| * | feat(timer): implement 16-bit timers | Uri Shaked | 2020-04-12 | 2 | -24/+148 |
| | | | | | e.g. Timer/Counter1 on ATmega328 | ||||
| * | fix: GPIO port listeners not invoked when writing to DDR registers | Uri Shaked | 2020-04-02 | 2 | -3/+17 |
| | | | | | close #28 | ||||
| * | refactor: added peripherals and cpu feature folders | lironh | 2020-03-22 | 8 | -0/+1566 |
