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* perf!: centeral timekeepingUri Shaked2020-12-0910-211/+173
* refactor: central interrupt handling #38Uri Shaked2020-12-0910-89/+208
* fix(usart): respect the given baud rate #16Uri Shaked2020-11-272-54/+150
* feat(clock): Clock Prescale (CLKPR) support #68Uri Shaked2020-11-252-0/+184
* feat: Support for simulating ATtinyx5 (e.g. ATtiny85) timers #64Uri Shaked2020-11-142-12/+60
* fix: AVRTimerConfig interface not exported #65Uri Shaked2020-11-141-1/+1
* test(gpio): extract constantsUri Shaked2020-10-071-26/+30
* fix(gpio): Changing pinMode from `INPUT` to `INPUT_PULLUP` doesn't trigger li...Uri Shaked2020-10-072-4/+13
* perf(timer): speed up interrupt handlingUri Shaked2020-09-021-1/+4
* perf(timer): improve timer speedUri Shaked2020-09-022-11/+17
* style(spi): remove redundant eslint commentsUri Shaked2020-08-221-2/+0
* feat(spi): implement SPI master #33Uri Shaked2020-08-222-0/+351
* test(eeprom): remove useless lineUri Shaked2020-08-221-1/+0
* fix(timer): keeps counting even when stopped #41Uri Shaked2020-08-012-36/+51
* test(timer): use TestProgramRunnerUri Shaked2020-08-012-134/+127
* fix(eeprom): EEPROM write fails after first attemptUri Shaked2020-07-162-1/+33
* feat(eeprom): implement EEPROM peripheralUri Shaked2020-07-163-41/+369
* test(timer): remove stray console.logUri Shaked2020-07-161-1/+0
* test(twi): extract constantsUri Shaked2020-07-161-31/+46
* fix(usart): bitsPerChar looking at the wrong registerUri Shaked2020-07-092-7/+10
* fix(usart): TXC interrupt triggered incorrectlyUri Shaked2020-07-092-4/+18
* test(usart): extract constantsUri Shaked2020-07-091-49/+68
* test(timer): extract constantsUri Shaked2020-05-301-133/+185
* fix(gpio): port state not updated on DDR writeUri Shaked2020-05-292-0/+15
* perf(timer): improve tick() performanceUri Shaked2020-05-251-3/+4
* feat(timer): Compare Match Output (#45)Uri Shaked2020-05-253-57/+338
* feat(gpio): add setPin() functionUri Shaked2020-05-102-0/+43
* fix(timer): stop Timer 2 when all CS bits are 0Uri Shaked2020-05-041-1/+1
* fix(timer): Reading TCNT in 2-cycle instructionsUri Shaked2020-04-292-4/+23
* fix(timer): incorrect high counter byte behaviorUri Shaked2020-04-282-46/+89
* style: reformat code with prettier 2.xUri Shaked2020-04-276-27/+27
* fix(timer): Timer value should not increment on the same cycle as TCNTn writeUri Shaked2020-04-272-2/+48
* test(timer): add more 16-bit timer testsUri Shaked2020-04-122-13/+56
* feat(timer): implement 16-bit timersUri Shaked2020-04-122-24/+148
* fix: GPIO port listeners not invoked when writing to DDR registersUri Shaked2020-04-022-3/+17
* refactor: added peripherals and cpu feature folderslironh2020-03-228-0/+1566
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