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* fix(timer): Incorrect count when stopping a timerUri Shaked2020-12-122-18/+41
| | | | fix #72
* perf!: centeral timekeepingUri Shaked2020-12-0910-211/+173
| | | | | | | | | This should improve performance, especially when running simulations with multiple peripherals. For instance, the demo project now runs at ~322%, up from ~185% in AVR8js 0.13.1. BREAKING CHANGE: `tick()` methods were removed from individual peripherals. You now need to call `cpu.tick()` instead.
* refactor: central interrupt handling #38Uri Shaked2020-12-0910-89/+208
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* fix(usart): respect the given baud rate #16Uri Shaked2020-11-272-54/+150
| | | | close #16
* feat(clock): Clock Prescale (CLKPR) support #68Uri Shaked2020-11-252-0/+184
| | | | close #68
* feat: Support for simulating ATtinyx5 (e.g. ATtiny85) timers #64Uri Shaked2020-11-142-12/+60
| | | | close #64
* fix: AVRTimerConfig interface not exported #65Uri Shaked2020-11-141-1/+1
| | | | close #65
* test(gpio): extract constantsUri Shaked2020-10-071-26/+30
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* fix(gpio): Changing pinMode from `INPUT` to `INPUT_PULLUP` doesn't trigger ↵Uri Shaked2020-10-072-4/+13
| | | | | | listeners close #62
* perf(timer): speed up interrupt handlingUri Shaked2020-09-021-1/+4
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* perf(timer): improve timer speedUri Shaked2020-09-022-11/+17
| | | | cache the value of the clock divider
* style(spi): remove redundant eslint commentsUri Shaked2020-08-221-2/+0
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* feat(spi): implement SPI master #33Uri Shaked2020-08-222-0/+351
| | | | close #33
* test(eeprom): remove useless lineUri Shaked2020-08-221-1/+0
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* fix(timer): keeps counting even when stopped #41Uri Shaked2020-08-012-36/+51
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* test(timer): use TestProgramRunnerUri Shaked2020-08-012-134/+127
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* fix(eeprom): EEPROM write fails after first attemptUri Shaked2020-07-162-1/+33
| | | | close #54
* feat(eeprom): implement EEPROM peripheralUri Shaked2020-07-163-41/+369
| | | | close #15
* test(timer): remove stray console.logUri Shaked2020-07-161-1/+0
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* test(twi): extract constantsUri Shaked2020-07-161-31/+46
| | | | This makes the test code more readable
* fix(usart): bitsPerChar looking at the wrong registerUri Shaked2020-07-092-7/+10
| | | | close #52
* fix(usart): TXC interrupt triggered incorrectlyUri Shaked2020-07-092-4/+18
| | | | close #51
* test(usart): extract constantsUri Shaked2020-07-091-49/+68
| | | | This makes the test code easier to read
* test(timer): extract constantsUri Shaked2020-05-301-133/+185
| | | | This makes the test code easier to follow
* fix(gpio): port state not updated on DDR writeUri Shaked2020-05-292-0/+15
| | | | | | Calling `pinState()` inside a GPIO port listener returns incorrect values after changing DDR close #47
* perf(timer): improve tick() performanceUri Shaked2020-05-251-3/+4
| | | | reduce the number of calls to TIFR/TIMSK getters
* feat(timer): Compare Match Output (#45)Uri Shaked2020-05-253-57/+338
| | | | | The Compare Match Output bits are used to generate hardware PWM signals on selected MCU pins. This is also the mechanism used by Arduino's analogWrite() method. See #32 for more details
* feat(gpio): add setPin() functionUri Shaked2020-05-102-0/+43
| | | | close #26
* fix(timer): stop Timer 2 when all CS bits are 0Uri Shaked2020-05-041-1/+1
| | | | close #44
* fix(timer): Reading TCNT in 2-cycle instructionsUri Shaked2020-04-292-4/+23
| | | | close #40
* fix(timer): incorrect high counter byte behaviorUri Shaked2020-04-282-46/+89
| | | | | | According to the datasheet, the value of the high byte of the counter for 16-bit timers (such as timer 1) is only updated when the low byte is being read/written. close #37
* style: reformat code with prettier 2.xUri Shaked2020-04-276-27/+27
| | | | prettier rules have changed since we upgraded to 2.x
* fix(timer): Timer value should not increment on the same cycle as TCNTn writeUri Shaked2020-04-272-2/+48
| | | | close #36
* test(timer): add more 16-bit timer testsUri Shaked2020-04-122-13/+56
| | | | also fix some issues found by @gfeun and the tests
* feat(timer): implement 16-bit timersUri Shaked2020-04-122-24/+148
| | | | e.g. Timer/Counter1 on ATmega328
* fix: GPIO port listeners not invoked when writing to DDR registersUri Shaked2020-04-022-3/+17
| | | | close #28
* refactor: added peripherals and cpu feature folderslironh2020-03-228-0/+1566
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