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2020-06-04test(instruction): extract constantsUri Shaked1-238/+274
2020-05-30test(timer): extract constantsUri Shaked1-133/+185
2020-05-29fix(gpio): port state not updated on DDR writeUri Shaked2-0/+15
2020-05-25perf(timer): improve tick() performanceUri Shaked1-3/+4
2020-05-25feat(timer): Compare Match Output (#45)Uri Shaked4-57/+342
2020-05-10feat(gpio): add setPin() functionUri Shaked2-0/+43
2020-05-04fix(timer): stop Timer 2 when all CS bits are 0Uri Shaked1-1/+1
2020-04-29fix(timer): Reading TCNT in 2-cycle instructionsUri Shaked3-16/+35
2020-04-28fix(timer): incorrect high counter byte behaviorUri Shaked3-46/+97
2020-04-28fix(instruction): LD, ST instructions should take 2 clock cyclesUri Shaked2-20/+33
2020-04-27style: reformat code with prettier 2.xUri Shaked9-34/+34
2020-04-27fix(timer): Timer value should not increment on the same cycle as TCNTn writeUri Shaked2-2/+48
2020-04-12test(timer): add more 16-bit timer testsUri Shaked2-13/+56
2020-04-12feat(timer): implement 16-bit timersUri Shaked2-24/+148
2020-04-09feat(instruction): 22-bit PC support #31Uri Shaked4-20/+120
2020-04-09feat(instruction): implement EICALL, EIJMP #31Uri Shaked2-0/+38
2020-04-08feat(instruction): implement ELPM #31Uri Shaked2-0/+71
2020-04-02fix: GPIO port listeners not invoked when writing to DDR registersUri Shaked2-3/+17
2020-04-02test(instruction): use assembly in testsUri Shaked1-89/+91
2020-03-22refactor: added peripherals and cpu feature folderslironh15-25/+25
2020-03-18style(cpu): relocate some stray commentsUri Shaked1-4/+4
2020-03-18Move first comment inside functiongfeun1-1/+1
2020-03-18Optimize opcode checkgfeun1-372/+186
2020-02-03feat(twi): proper interrupt support #10Uri Shaked2-5/+20
2020-02-03test(twi): add master TWI receive test #10Uri Shaked1-1/+175
2020-02-03test(twi): refactor assembly code to be shorterUri Shaked1-16/+11
2020-01-31test(twi): assembly code to test master transmit #10Uri Shaked2-3/+199
2020-01-31fix(assembler): BRBC/BRBS forward labels failUri Shaked2-2/+10
2020-01-30test(instruction): fix incorrect opcode in testsUri Shaked1-1/+1
2020-01-30test(assembler): add unit testsUri Shaked2-52/+379
2020-01-30feat: add a simple AVR assembler for use in testsUri Shaked2-0/+983
2020-01-30feat(twi): partial TWI master implementation #10Uri Shaked3-0/+211
2020-01-11fix(gpio): pinState() value incorrect in GPIO listenersUri Shaked2-1/+16
2020-01-08feat(gpio): add pinState() methodUri Shaked3-4/+69
2019-12-07refactor: tslint → eslintUri Shaked5-10/+13
2019-12-07feat(usart): add onLineTransmit callbackUri Shaked2-0/+56
2019-12-07test(usart): more USART testsUri Shaked2-1/+57
2019-12-01feat: add benchmarking codeUri Shaked1-15/+15
2019-12-01feat: initial implementation of USARTUri Shaked3-0/+180
2019-11-30fix: Wrong prescaler for Timer2Uri Shaked2-6/+44
2019-11-30feat: Output Compare for TimersUri Shaked2-6/+185
2019-11-30feat: add more GPIO portsUri Shaked2-1/+57
2019-11-27fix: SP not initialized on resetUri Shaked4-2/+28
2019-11-25feat: GPIO peripheral implementationUri Shaked4-2/+126
2019-11-21feat: initial timer implementationUri Shaked3-0/+232
2019-11-21doc: add comment to interrupt.tsUri Shaked1-0/+8
2019-11-21feat: implement avrInterrupt()Uri Shaked3-0/+30
2019-11-20test: SWAP, STSUri Shaked1-1/+19
2019-11-20fix: SREG issues in ADC, CPC, SBC, SBCIUri Shaked2-10/+52
2019-11-20feat: implement most instructionsUri Shaked2-113/+455
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