| Commit message (Collapse) | Author | Files | Lines | ||
|---|---|---|---|---|---|
| 2020-05-30 | test(timer): extract constants | Uri Shaked | 1 | -133/+185 | |
| This makes the test code easier to follow | |||||
| 2020-05-29 | fix(gpio): port state not updated on DDR write | Uri Shaked | 2 | -0/+15 | |
| Calling `pinState()` inside a GPIO port listener returns incorrect values after changing DDR close #47 | |||||
| 2020-05-25 | perf(timer): improve tick() performance | Uri Shaked | 1 | -3/+4 | |
| reduce the number of calls to TIFR/TIMSK getters | |||||
| 2020-05-25 | feat(timer): Compare Match Output (#45) | Uri Shaked | 4 | -57/+342 | |
| The Compare Match Output bits are used to generate hardware PWM signals on selected MCU pins. This is also the mechanism used by Arduino's analogWrite() method. See #32 for more details | |||||
| 2020-05-10 | feat(gpio): add setPin() function | Uri Shaked | 2 | -0/+43 | |
| close #26 | |||||
| 2020-05-04 | fix(timer): stop Timer 2 when all CS bits are 0 | Uri Shaked | 1 | -1/+1 | |
| close #44 | |||||
| 2020-04-29 | fix(timer): Reading TCNT in 2-cycle instructions | Uri Shaked | 3 | -16/+35 | |
| close #40 | |||||
| 2020-04-28 | fix(timer): incorrect high counter byte behavior | Uri Shaked | 3 | -46/+97 | |
| According to the datasheet, the value of the high byte of the counter for 16-bit timers (such as timer 1) is only updated when the low byte is being read/written. close #37 | |||||
| 2020-04-28 | fix(instruction): LD, ST instructions should take 2 clock cycles | Uri Shaked | 2 | -20/+33 | |
| close #39 | |||||
| 2020-04-27 | style: reformat code with prettier 2.x | Uri Shaked | 9 | -34/+34 | |
| prettier rules have changed since we upgraded to 2.x | |||||
| 2020-04-27 | fix(timer): Timer value should not increment on the same cycle as TCNTn write | Uri Shaked | 2 | -2/+48 | |
| close #36 | |||||
| 2020-04-12 | test(timer): add more 16-bit timer tests | Uri Shaked | 2 | -13/+56 | |
| also fix some issues found by @gfeun and the tests | |||||
| 2020-04-12 | feat(timer): implement 16-bit timers | Uri Shaked | 2 | -24/+148 | |
| e.g. Timer/Counter1 on ATmega328 | |||||
| 2020-04-09 | feat(instruction): 22-bit PC support #31 | Uri Shaked | 4 | -20/+120 | |
| adapt CALL, ICALL, RCALL, RET, and RETI for MCUs with 22-bit PC | |||||
| 2020-04-09 | feat(instruction): implement EICALL, EIJMP #31 | Uri Shaked | 2 | -0/+38 | |
| 2020-04-08 | feat(instruction): implement ELPM #31 | Uri Shaked | 2 | -0/+71 | |
| 2020-04-02 | fix: GPIO port listeners not invoked when writing to DDR registers | Uri Shaked | 2 | -3/+17 | |
| close #28 | |||||
| 2020-04-02 | test(instruction): use assembly in tests | Uri Shaked | 1 | -89/+91 | |
| Refactored the tests to use AVR assembly instead of hardcoded bytecode. This change should make the tests much easier to read and maintain. Before: loadProgram('659a'); Now: loadProgram('SBI 0x0c, 5'); | |||||
| 2020-03-22 | refactor: added peripherals and cpu feature folders | lironh | 15 | -25/+25 | |
| 2020-03-18 | style(cpu): relocate some stray comments | Uri Shaked | 1 | -4/+4 | |
| 2020-03-18 | Move first comment inside function | gfeun | 1 | -1/+1 | |
| 2020-03-18 | Optimize opcode check | gfeun | 1 | -372/+186 | |
| 2020-02-03 | feat(twi): proper interrupt support #10 | Uri Shaked | 2 | -5/+20 | |
| 2020-02-03 | test(twi): add master TWI receive test #10 | Uri Shaked | 1 | -1/+175 | |
| 2020-02-03 | test(twi): refactor assembly code to be shorter | Uri Shaked | 1 | -16/+11 | |
| 2020-01-31 | test(twi): assembly code to test master transmit #10 | Uri Shaked | 2 | -3/+199 | |
| 2020-01-31 | fix(assembler): BRBC/BRBS forward labels fail | Uri Shaked | 2 | -2/+10 | |
| 2020-01-30 | test(instruction): fix incorrect opcode in tests | Uri Shaked | 1 | -1/+1 | |
| 2020-01-30 | test(assembler): add unit tests | Uri Shaked | 2 | -52/+379 | |
| fix some bugs found during unit tests | |||||
| 2020-01-30 | feat: add a simple AVR assembler for use in tests | Uri Shaked | 2 | -0/+983 | |
| 2020-01-30 | feat(twi): partial TWI master implementation #10 | Uri Shaked | 3 | -0/+211 | |
| 2020-01-11 | fix(gpio): pinState() value incorrect in GPIO listeners | Uri Shaked | 2 | -1/+16 | |
| fix #9 | |||||
| 2020-01-08 | feat(gpio): add pinState() method | Uri Shaked | 3 | -4/+69 | |
| close #8 | |||||
| 2019-12-07 | refactor: tslint → eslint | Uri Shaked | 5 | -10/+13 | |
| 2019-12-07 | feat(usart): add onLineTransmit callback | Uri Shaked | 2 | -0/+56 | |
| 2019-12-07 | test(usart): more USART tests | Uri Shaked | 2 | -1/+57 | |
| 2019-12-01 | feat: add benchmarking code | Uri Shaked | 1 | -15/+15 | |
| 2019-12-01 | feat: initial implementation of USART | Uri Shaked | 3 | -0/+180 | |
| #6 | |||||
| 2019-11-30 | fix: Wrong prescaler for Timer2 | Uri Shaked | 2 | -6/+44 | |
| fix #5 | |||||
| 2019-11-30 | feat: Output Compare for Timers | Uri Shaked | 2 | -6/+185 | |
| close #4 | |||||
| 2019-11-30 | feat: add more GPIO ports | Uri Shaked | 2 | -1/+57 | |
| close #3 | |||||
| 2019-11-27 | fix: SP not initialized on reset | Uri Shaked | 4 | -2/+28 | |
| close #2 | |||||
| 2019-11-25 | feat: GPIO peripheral implementation | Uri Shaked | 4 | -2/+126 | |
| Add new AVRIOPort class, implements GPIO output logic | |||||
| 2019-11-21 | feat: initial timer implementation | Uri Shaked | 3 | -0/+232 | |
| 8-bit timers basic functionality + tests: 1. basic counting + prescaler 2. timer overflow 3. timer overflow interrupt | |||||
| 2019-11-21 | doc: add comment to interrupt.ts | Uri Shaked | 1 | -0/+8 | |
| 2019-11-21 | feat: implement avrInterrupt() | Uri Shaked | 3 | -0/+30 | |
| used to invoke hardware interrupt | |||||
| 2019-11-20 | test: SWAP, STS | Uri Shaked | 1 | -1/+19 | |
| 2019-11-20 | fix: SREG issues in ADC, CPC, SBC, SBCI | Uri Shaked | 2 | -10/+52 | |
| also added regression test cases | |||||
| 2019-11-20 | feat: implement most instructions | Uri Shaked | 2 | -113/+455 | |
| 2019-11-20 | feat: LPM, LSR, MOV, MOVW, MUL, MULS, MULSU, NEG | Uri Shaked | 2 | -19/+195 | |
| + tests | |||||
