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2021-10-22fix(spi): setting SPIE doesn't fire pending interruptUri Shaked2-0/+25
2021-10-07feat(timer): Force Output Compare (FOC) bitsUri Shaked2-5/+98
2021-09-14feat(timer): 3rd output compare (OCRnC) #96Uri Shaked2-13/+170
2021-09-10refactor: remove the ICPU interfaceUri Shaked4-34/+19
Removing the interface simplifies the code
2021-09-10feat(adc): ADC peripheral #13Uri Shaked3-0/+405
2021-09-10feat(watchdog): implement watchdog timer #106Uri Shaked5-1/+357
2021-09-07fix(gpio): CBI/SBI handling in writes to PIN register #103Uri Shaked4-8/+50
fix #103
2021-08-15feat(timer): external timer support #97Uri Shaked5-95/+171
also refactor timer/GPIO interaction to be more generic. close #97
2021-08-15chore(deps): prettier 2.3.2Uri Shaked1-16/+2
also reformat all the code with the new version
2021-08-13fix(gpio): timer outputs not reflected in PIN register #102Uri Shaked2-8/+22
fix #102
2021-08-09fix(gpio): PWM may leaves pins in high stateUri Shaked1-0/+1
Disabling PWM when a GPIO pin is high will cause the pin to get stuck in high state.
2021-08-07style(spi): remove redundant whitespace from commentsUri Shaked1-2/+2
2021-07-17feat(usart): add `immediate` parameter to writeByte()Uri Shaked1-8/+12
The value will be available immediately to the user program instead of waiting one symbol time before making it available.
2021-07-16fix(usart): tx / rx complete timingUri Shaked1-1/+1
fix the calculation of cyclesPerChar, which is used to determine when a USART RX/TX operation is marked complete.
2021-07-15feat(usart): add configuration change eventUri Shaked2-3/+95
also add `txEnable` and `rxEnable` properties
2021-07-07fix(timer): only set ICR hook for 16-bit timersUri Shaked1-3/+3
The ICR (Input Capture Register) only exists for 16-bit timers.
2021-07-07feat(gpio): external interrupt/PCINT support (#82)Uri Shaked4-18/+459
close #70, #84
2021-06-20perf(cpu): speed up event systemUri Shaked1-25/+47
Use a linked list instead of array. This makes the simulator runs almost twice as fast in case of timers with prescaler of 1, e.g. when using the TVout library. In addition, we use a pool of clock event objects to avoid expensive GCs.
2021-06-19fix(timer): Timer1 PWM issues #94Uri Shaked2-2/+24
close #94
2021-04-15fix(twi): broken repeated start #91Uri Shaked2-1/+26
fix #91
2021-02-19feat(usart): implement RX #11Uri Shaked4-7/+99
close #11
2021-01-02fix: typo in parameter nameUri Shaked3-6/+6
freqMHz → freqHz in SPI, TWI, and USART: they all expect the frequency in hertz, not mega-hertz.
2020-12-29fix(timer): delay() is inaccurate #81Uri Shaked2-21/+26
fix #81
2020-12-27fix(timer): Output Compare in PWM modes #78Uri Shaked6-67/+353
close #78
2020-12-26fix(timer): Overflow interrupt fires twice #80Uri Shaked2-7/+45
fix #80
2020-12-25fix(timer): Output Compare sometimes misses Compare Match #79Uri Shaked2-6/+45
fix #79
2020-12-21fix(timer): Output Compare issue #74Uri Shaked2-10/+28
output compare doesn't work when the OCR register (OCRnA/OCRnB) equals to 0 fix #74
2020-12-20fix(timer): TOV flag does not update correctly #75Uri Shaked2-20/+56
fix #75
2020-12-20fix(timer): OCR values should be buffered #76Uri Shaked2-11/+125
fix #76
2020-12-12perf(cpu): speed up event systemUri Shaked2-18/+59
ditch `array.sort()` and instead manually keep the array sorted when we insert a new item.
2020-12-12test(cpu): fix implicit any errorUri Shaked1-3/+5
2020-12-12fix(cpu): event system issueUri Shaked2-2/+63
`updateClockEvent()` and `clearClockEvent()` would sometimes mess up the list of events. This could cause unexpected behavior when you have multiple timers running. Also added regression tests for these methods.
2020-12-12fix(timer): Incorrect count when stopping a timerUri Shaked2-18/+41
fix #72
2020-12-09perf!: centeral timekeepingUri Shaked12-221/+222
This should improve performance, especially when running simulations with multiple peripherals. For instance, the demo project now runs at ~322%, up from ~185% in AVR8js 0.13.1. BREAKING CHANGE: `tick()` methods were removed from individual peripherals. You now need to call `cpu.tick()` instead.
2020-12-09refactor: central interrupt handling #38Uri Shaked12-92/+285
2020-12-09test(cpu): improve test nameUri Shaked1-1/+1
2020-11-27fix(usart): respect the given baud rate #16Uri Shaked2-54/+150
close #16
2020-11-25feat(clock): Clock Prescale (CLKPR) support #68Uri Shaked3-0/+185
close #68
2020-11-14feat: Support for simulating ATtinyx5 (e.g. ATtiny85) timers #64Uri Shaked2-12/+60
close #64
2020-11-14fix: AVRTimerConfig interface not exported #65Uri Shaked2-2/+8
close #65
2020-10-07test(gpio): extract constantsUri Shaked1-26/+30
2020-10-07fix(gpio): Changing pinMode from `INPUT` to `INPUT_PULLUP` doesn't trigger ↵Uri Shaked2-4/+13
listeners close #62
2020-09-30fix(cpu): incorrect address for RAMPZ / EINDUri Shaked2-8/+8
We used their I/O space address intead of their data space address. close #61
2020-09-02perf(timer): speed up interrupt handlingUri Shaked1-1/+4
2020-09-02perf(timer): improve timer speedUri Shaked2-11/+17
cache the value of the clock divider
2020-09-02fix(interrupt): broken on ATmega2560Uri Shaked2-1/+23
close #58
2020-09-02fix(instruction): EICALL is brokenUri Shaked2-1/+3
close #59
2020-08-22style(spi): remove redundant eslint commentsUri Shaked1-2/+0
2020-08-22feat(spi): implement SPI master #33Uri Shaked4-1/+368
close #33
2020-08-22test(eeprom): remove useless lineUri Shaked1-1/+0
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