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* feat(timer): 3rd output compare (OCRnC) #96Uri Shaked2021-09-142-13/+170
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* refactor: remove the ICPU interfaceUri Shaked2021-09-104-34/+19
| | | | Removing the interface simplifies the code
* feat(adc): ADC peripheral #13Uri Shaked2021-09-103-0/+405
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* feat(watchdog): implement watchdog timer #106Uri Shaked2021-09-105-1/+357
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* fix(gpio): CBI/SBI handling in writes to PIN register #103Uri Shaked2021-09-074-8/+50
| | | | fix #103
* feat(timer): external timer support #97Uri Shaked2021-08-155-95/+171
| | | | | | also refactor timer/GPIO interaction to be more generic. close #97
* chore(deps): prettier 2.3.2Uri Shaked2021-08-151-16/+2
| | | | also reformat all the code with the new version
* fix(gpio): timer outputs not reflected in PIN register #102Uri Shaked2021-08-132-8/+22
| | | | fix #102
* fix(gpio): PWM may leaves pins in high stateUri Shaked2021-08-091-0/+1
| | | | Disabling PWM when a GPIO pin is high will cause the pin to get stuck in high state.
* style(spi): remove redundant whitespace from commentsUri Shaked2021-08-071-2/+2
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* feat(usart): add `immediate` parameter to writeByte()Uri Shaked2021-07-171-8/+12
| | | | The value will be available immediately to the user program instead of waiting one symbol time before making it available.
* fix(usart): tx / rx complete timingUri Shaked2021-07-161-1/+1
| | | | fix the calculation of cyclesPerChar, which is used to determine when a USART RX/TX operation is marked complete.
* feat(usart): add configuration change eventUri Shaked2021-07-152-3/+95
| | | | also add `txEnable` and `rxEnable` properties
* fix(timer): only set ICR hook for 16-bit timersUri Shaked2021-07-071-3/+3
| | | | The ICR (Input Capture Register) only exists for 16-bit timers.
* feat(gpio): external interrupt/PCINT support (#82)Uri Shaked2021-07-074-18/+459
| | | close #70, #84
* perf(cpu): speed up event systemUri Shaked2021-06-201-25/+47
| | | | | | Use a linked list instead of array. This makes the simulator runs almost twice as fast in case of timers with prescaler of 1, e.g. when using the TVout library. In addition, we use a pool of clock event objects to avoid expensive GCs.
* fix(timer): Timer1 PWM issues #94Uri Shaked2021-06-192-2/+24
| | | | close #94
* fix(twi): broken repeated start #91Uri Shaked2021-04-152-1/+26
| | | | fix #91
* feat(usart): implement RX #11Uri Shaked2021-02-194-7/+99
| | | | close #11
* fix: typo in parameter nameUri Shaked2021-01-023-6/+6
| | | | | freqMHz → freqHz in SPI, TWI, and USART: they all expect the frequency in hertz, not mega-hertz.
* fix(timer): delay() is inaccurate #81Uri Shaked2020-12-292-21/+26
| | | | fix #81
* fix(timer): Output Compare in PWM modes #78Uri Shaked2020-12-276-67/+353
| | | | close #78
* fix(timer): Overflow interrupt fires twice #80Uri Shaked2020-12-262-7/+45
| | | | fix #80
* fix(timer): Output Compare sometimes misses Compare Match #79Uri Shaked2020-12-252-6/+45
| | | | fix #79
* fix(timer): Output Compare issue #74Uri Shaked2020-12-212-10/+28
| | | | | | output compare doesn't work when the OCR register (OCRnA/OCRnB) equals to 0 fix #74
* fix(timer): TOV flag does not update correctly #75Uri Shaked2020-12-202-20/+56
| | | | fix #75
* fix(timer): OCR values should be buffered #76Uri Shaked2020-12-202-11/+125
| | | | fix #76
* perf(cpu): speed up event systemUri Shaked2020-12-122-18/+59
| | | | ditch `array.sort()` and instead manually keep the array sorted when we insert a new item.
* test(cpu): fix implicit any errorUri Shaked2020-12-121-3/+5
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* fix(cpu): event system issueUri Shaked2020-12-122-2/+63
| | | | | | | `updateClockEvent()` and `clearClockEvent()` would sometimes mess up the list of events. This could cause unexpected behavior when you have multiple timers running. Also added regression tests for these methods.
* fix(timer): Incorrect count when stopping a timerUri Shaked2020-12-122-18/+41
| | | | fix #72
* perf!: centeral timekeepingUri Shaked2020-12-0912-221/+222
| | | | | | | | | This should improve performance, especially when running simulations with multiple peripherals. For instance, the demo project now runs at ~322%, up from ~185% in AVR8js 0.13.1. BREAKING CHANGE: `tick()` methods were removed from individual peripherals. You now need to call `cpu.tick()` instead.
* refactor: central interrupt handling #38Uri Shaked2020-12-0912-92/+285
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* test(cpu): improve test nameUri Shaked2020-12-091-1/+1
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* fix(usart): respect the given baud rate #16Uri Shaked2020-11-272-54/+150
| | | | close #16
* feat(clock): Clock Prescale (CLKPR) support #68Uri Shaked2020-11-253-0/+185
| | | | close #68
* feat: Support for simulating ATtinyx5 (e.g. ATtiny85) timers #64Uri Shaked2020-11-142-12/+60
| | | | close #64
* fix: AVRTimerConfig interface not exported #65Uri Shaked2020-11-142-2/+8
| | | | close #65
* test(gpio): extract constantsUri Shaked2020-10-071-26/+30
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* fix(gpio): Changing pinMode from `INPUT` to `INPUT_PULLUP` doesn't trigger ↵Uri Shaked2020-10-072-4/+13
| | | | | | listeners close #62
* fix(cpu): incorrect address for RAMPZ / EINDUri Shaked2020-09-302-8/+8
| | | | | | We used their I/O space address intead of their data space address. close #61
* perf(timer): speed up interrupt handlingUri Shaked2020-09-021-1/+4
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* perf(timer): improve timer speedUri Shaked2020-09-022-11/+17
| | | | cache the value of the clock divider
* fix(interrupt): broken on ATmega2560Uri Shaked2020-09-022-1/+23
| | | | close #58
* fix(instruction): EICALL is brokenUri Shaked2020-09-022-1/+3
| | | | close #59
* style(spi): remove redundant eslint commentsUri Shaked2020-08-221-2/+0
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* feat(spi): implement SPI master #33Uri Shaked2020-08-224-1/+368
| | | | close #33
* test(eeprom): remove useless lineUri Shaked2020-08-221-1/+0
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* fix(timer): keeps counting even when stopped #41Uri Shaked2020-08-012-36/+51
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* test(timer): use TestProgramRunnerUri Shaked2020-08-013-135/+128
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