| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | fix(cpu): don't clear RAM on reset #107 | Uri Shaked | 2022-04-30 | 1 | -1/+0 |
| | | | | | wokwi/wokwi-features#282 | ||||
| * | fix(timer): Phase Correct mode overruns #119 | Uri Shaked | 2022-03-22 | 2 | -2/+67 |
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| * | fix(timer): OCRH masking #117 | Uri Shaked | 2022-02-21 | 2 | -3/+29 |
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| * | style(instruction.spec): add comments for missing instruction tests and ↵ | Dudeplayz | 2022-02-07 | 1 | -33/+103 |
| | | | | | reorder tests according to the AVR datasheet | ||||
| * | test(instruction): add ADD, SUB and WDR unit tests | Dudeplayz | 2022-02-07 | 1 | -0/+54 |
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| * | test(watchdog): more robust tests | Uri Shaked | 2022-02-07 | 1 | -0/+2 |
| | | | | | add assertions, fix #115 | ||||
| * | perf(cpu): speed up interrupts | Uri Shaked | 2022-01-20 | 1 | -11/+28 |
| | | | | | | | code which makes heavy use of interrupts considerably slows down the simulator. E.g. that transmit programs large amount of data over SPI. See wokwi/wokwi-features#280 for an example. | ||||
| * | fix(twi): fails on repeated start condition | Uri Shaked | 2021-12-13 | 1 | -1/+12 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | reproduction: https://wokwi.com/arduino/projects/306115576172905024 minimal reproduction code: ```cpp #include <Wire.h> void setup() { Serial.begin(115200); Wire.begin(); Wire.beginTransmission(0x68); Wire.write( 0x3B); Wire.endTransmission( false); // <---- Fails after this auto n = Wire.requestFrom(0x68, 6); if (n == 6) { int16_t AcX = Wire.read() << 8 | Wire.read(); // 0x3B (ACCEL_XOUT_H) & 0x3C (ACCEL_XOUT_L) int16_t AcY = Wire.read() << 8 | Wire.read(); // 0x3D (ACCEL_YOUT_H) & 0x3E (ACCEL_YOUT_L) int16_t AcZ = Wire.read() << 8 | Wire.read(); // 0x3F (ACCEL_ZOUT_H) & 0x40 (ACCEL_ZOUT_L) Serial.print( "AcX = "); Serial.print( AcX); Serial.print( " | AcY = "); Serial.print( AcY); Serial.print( " | AcZ = "); Serial.print( AcZ); Serial.println(); } else { Serial.println( "--------- ERROR ---------"); } } void loop() {} ``` | ||||
| * | feat(spi): add `onByte` callback | Uri Shaked | 2021-10-30 | 2 | -19/+44 |
| | | | | | | | a more versatile alternative to the `onTransfer` callback. Depracate `onTransfer()`. | ||||
| * | fix(timer): setting TCNT doesn't update OCRA #111 | Uri Shaked | 2021-10-29 | 2 | -0/+44 |
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| * | fix(eeprom): EEPROM interrupt not firing #110 | Uri Shaked | 2021-10-24 | 3 | -5/+35 |
| | | | | | fix #110 | ||||
| * | fix(spi): setting SPIE doesn't fire pending interrupt | Uri Shaked | 2021-10-22 | 2 | -0/+25 |
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| * | feat(timer): Force Output Compare (FOC) bits | Uri Shaked | 2021-10-07 | 2 | -5/+98 |
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| * | feat(timer): 3rd output compare (OCRnC) #96 | Uri Shaked | 2021-09-14 | 2 | -13/+170 |
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| * | refactor: remove the ICPU interface | Uri Shaked | 2021-09-10 | 4 | -34/+19 |
| | | | | | Removing the interface simplifies the code | ||||
| * | feat(adc): ADC peripheral #13 | Uri Shaked | 2021-09-10 | 3 | -0/+405 |
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| * | feat(watchdog): implement watchdog timer #106 | Uri Shaked | 2021-09-10 | 5 | -1/+357 |
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| * | fix(gpio): CBI/SBI handling in writes to PIN register #103 | Uri Shaked | 2021-09-07 | 4 | -8/+50 |
| | | | | | fix #103 | ||||
| * | feat(timer): external timer support #97 | Uri Shaked | 2021-08-15 | 5 | -95/+171 |
| | | | | | | | also refactor timer/GPIO interaction to be more generic. close #97 | ||||
| * | chore(deps): prettier 2.3.2 | Uri Shaked | 2021-08-15 | 1 | -16/+2 |
| | | | | | also reformat all the code with the new version | ||||
| * | fix(gpio): timer outputs not reflected in PIN register #102 | Uri Shaked | 2021-08-13 | 2 | -8/+22 |
| | | | | | fix #102 | ||||
| * | fix(gpio): PWM may leaves pins in high state | Uri Shaked | 2021-08-09 | 1 | -0/+1 |
| | | | | | Disabling PWM when a GPIO pin is high will cause the pin to get stuck in high state. | ||||
| * | style(spi): remove redundant whitespace from comments | Uri Shaked | 2021-08-07 | 1 | -2/+2 |
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| * | feat(usart): add `immediate` parameter to writeByte() | Uri Shaked | 2021-07-17 | 1 | -8/+12 |
| | | | | | The value will be available immediately to the user program instead of waiting one symbol time before making it available. | ||||
| * | fix(usart): tx / rx complete timing | Uri Shaked | 2021-07-16 | 1 | -1/+1 |
| | | | | | fix the calculation of cyclesPerChar, which is used to determine when a USART RX/TX operation is marked complete. | ||||
| * | feat(usart): add configuration change event | Uri Shaked | 2021-07-15 | 2 | -3/+95 |
| | | | | | also add `txEnable` and `rxEnable` properties | ||||
| * | fix(timer): only set ICR hook for 16-bit timers | Uri Shaked | 2021-07-07 | 1 | -3/+3 |
| | | | | | The ICR (Input Capture Register) only exists for 16-bit timers. | ||||
| * | feat(gpio): external interrupt/PCINT support (#82) | Uri Shaked | 2021-07-07 | 4 | -18/+459 |
| | | | | close #70, #84 | ||||
| * | perf(cpu): speed up event system | Uri Shaked | 2021-06-20 | 1 | -25/+47 |
| | | | | | | | Use a linked list instead of array. This makes the simulator runs almost twice as fast in case of timers with prescaler of 1, e.g. when using the TVout library. In addition, we use a pool of clock event objects to avoid expensive GCs. | ||||
| * | fix(timer): Timer1 PWM issues #94 | Uri Shaked | 2021-06-19 | 2 | -2/+24 |
| | | | | | close #94 | ||||
| * | fix(twi): broken repeated start #91 | Uri Shaked | 2021-04-15 | 2 | -1/+26 |
| | | | | | fix #91 | ||||
| * | feat(usart): implement RX #11 | Uri Shaked | 2021-02-19 | 4 | -7/+99 |
| | | | | | close #11 | ||||
| * | fix: typo in parameter name | Uri Shaked | 2021-01-02 | 3 | -6/+6 |
| | | | | | | freqMHz → freqHz in SPI, TWI, and USART: they all expect the frequency in hertz, not mega-hertz. | ||||
| * | fix(timer): delay() is inaccurate #81 | Uri Shaked | 2020-12-29 | 2 | -21/+26 |
| | | | | | fix #81 | ||||
| * | fix(timer): Output Compare in PWM modes #78 | Uri Shaked | 2020-12-27 | 6 | -67/+353 |
| | | | | | close #78 | ||||
| * | fix(timer): Overflow interrupt fires twice #80 | Uri Shaked | 2020-12-26 | 2 | -7/+45 |
| | | | | | fix #80 | ||||
| * | fix(timer): Output Compare sometimes misses Compare Match #79 | Uri Shaked | 2020-12-25 | 2 | -6/+45 |
| | | | | | fix #79 | ||||
| * | fix(timer): Output Compare issue #74 | Uri Shaked | 2020-12-21 | 2 | -10/+28 |
| | | | | | | | output compare doesn't work when the OCR register (OCRnA/OCRnB) equals to 0 fix #74 | ||||
| * | fix(timer): TOV flag does not update correctly #75 | Uri Shaked | 2020-12-20 | 2 | -20/+56 |
| | | | | | fix #75 | ||||
| * | fix(timer): OCR values should be buffered #76 | Uri Shaked | 2020-12-20 | 2 | -11/+125 |
| | | | | | fix #76 | ||||
| * | perf(cpu): speed up event system | Uri Shaked | 2020-12-12 | 2 | -18/+59 |
| | | | | | ditch `array.sort()` and instead manually keep the array sorted when we insert a new item. | ||||
| * | test(cpu): fix implicit any error | Uri Shaked | 2020-12-12 | 1 | -3/+5 |
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| * | fix(cpu): event system issue | Uri Shaked | 2020-12-12 | 2 | -2/+63 |
| | | | | | | | | `updateClockEvent()` and `clearClockEvent()` would sometimes mess up the list of events. This could cause unexpected behavior when you have multiple timers running. Also added regression tests for these methods. | ||||
| * | fix(timer): Incorrect count when stopping a timer | Uri Shaked | 2020-12-12 | 2 | -18/+41 |
| | | | | | fix #72 | ||||
| * | perf!: centeral timekeeping | Uri Shaked | 2020-12-09 | 12 | -221/+222 |
| | | | | | | | | | | This should improve performance, especially when running simulations with multiple peripherals. For instance, the demo project now runs at ~322%, up from ~185% in AVR8js 0.13.1. BREAKING CHANGE: `tick()` methods were removed from individual peripherals. You now need to call `cpu.tick()` instead. | ||||
| * | refactor: central interrupt handling #38 | Uri Shaked | 2020-12-09 | 12 | -92/+285 |
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| * | test(cpu): improve test name | Uri Shaked | 2020-12-09 | 1 | -1/+1 |
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| * | fix(usart): respect the given baud rate #16 | Uri Shaked | 2020-11-27 | 2 | -54/+150 |
| | | | | | close #16 | ||||
| * | feat(clock): Clock Prescale (CLKPR) support #68 | Uri Shaked | 2020-11-25 | 3 | -0/+185 |
| | | | | | close #68 | ||||
| * | feat: Support for simulating ATtinyx5 (e.g. ATtiny85) timers #64 | Uri Shaked | 2020-11-14 | 2 | -12/+60 |
| | | | | | close #64 | ||||
