avr8js - Unnamed repository; edit this file 'description' to name the repository.

	Commit message (Collapse)	Author	Age	Files	Lines
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*	feat(timer): Compare Match Output (#45)	Uri Shaked	2020-05-25	4	-57/+342
\| \| \| \| \|	The Compare Match Output bits are used to generate hardware PWM signals on selected MCU pins. This is also the mechanism used by Arduino's analogWrite() method. See #32 for more details
*	feat(gpio): add setPin() function	Uri Shaked	2020-05-10	2	-0/+43
\| \| \| \|	close #26
*	fix(timer): stop Timer 2 when all CS bits are 0	Uri Shaked	2020-05-04	1	-1/+1
\| \| \| \|	close #44
*	fix(timer): Reading TCNT in 2-cycle instructions	Uri Shaked	2020-04-29	3	-16/+35
\| \| \| \|	close #40
*	fix(timer): incorrect high counter byte behavior	Uri Shaked	2020-04-28	3	-46/+97
\| \| \| \| \| \|	According to the datasheet, the value of the high byte of the counter for 16-bit timers (such as timer 1) is only updated when the low byte is being read/written. close #37
*	fix(instruction): LD, ST instructions should take 2 clock cycles	Uri Shaked	2020-04-28	2	-20/+33
\| \| \| \|	close #39
*	style: reformat code with prettier 2.x	Uri Shaked	2020-04-27	9	-34/+34
\| \| \| \|	prettier rules have changed since we upgraded to 2.x
*	fix(timer): Timer value should not increment on the same cycle as TCNTn write	Uri Shaked	2020-04-27	2	-2/+48
\| \| \| \|	close #36
*	test(timer): add more 16-bit timer tests	Uri Shaked	2020-04-12	2	-13/+56
\| \| \| \|	also fix some issues found by @gfeun and the tests
*	feat(timer): implement 16-bit timers	Uri Shaked	2020-04-12	2	-24/+148
\| \| \| \|	e.g. Timer/Counter1 on ATmega328
*	feat(instruction): 22-bit PC support #31	Uri Shaked	2020-04-09	4	-20/+120
\| \| \| \|	adapt CALL, ICALL, RCALL, RET, and RETI for MCUs with 22-bit PC
*	feat(instruction): implement EICALL, EIJMP #31	Uri Shaked	2020-04-09	2	-0/+38
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*	feat(instruction): implement ELPM #31	Uri Shaked	2020-04-08	2	-0/+71
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*	fix: GPIO port listeners not invoked when writing to DDR registers	Uri Shaked	2020-04-02	2	-3/+17
\| \| \| \|	close #28
*	test(instruction): use assembly in tests	Uri Shaked	2020-04-02	1	-89/+91
\| \| \| \| \| \| \| \| \| \| \| \|	Refactored the tests to use AVR assembly instead of hardcoded bytecode. This change should make the tests much easier to read and maintain. Before: loadProgram('659a'); Now: loadProgram('SBI 0x0c, 5');
*	refactor: added peripherals and cpu feature folders	lironh	2020-03-22	15	-25/+25
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*	style(cpu): relocate some stray comments	Uri Shaked	2020-03-18	1	-4/+4
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*	Move first comment inside function	gfeun	2020-03-18	1	-1/+1
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*	Optimize opcode check	gfeun	2020-03-18	1	-372/+186
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*	feat(twi): proper interrupt support #10	Uri Shaked	2020-02-03	2	-5/+20
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*	test(twi): add master TWI receive test #10	Uri Shaked	2020-02-03	1	-1/+175
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*	test(twi): refactor assembly code to be shorter	Uri Shaked	2020-02-03	1	-16/+11
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*	test(twi): assembly code to test master transmit #10	Uri Shaked	2020-01-31	2	-3/+199
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*	fix(assembler): BRBC/BRBS forward labels fail	Uri Shaked	2020-01-31	2	-2/+10
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*	test(instruction): fix incorrect opcode in tests	Uri Shaked	2020-01-30	1	-1/+1
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*	test(assembler): add unit tests	Uri Shaked	2020-01-30	2	-52/+379
\| \| \| \|	fix some bugs found during unit tests
*	feat: add a simple AVR assembler for use in tests	Uri Shaked	2020-01-30	2	-0/+983
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*	feat(twi): partial TWI master implementation #10	Uri Shaked	2020-01-30	3	-0/+211
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*	fix(gpio): pinState() value incorrect in GPIO listeners	Uri Shaked	2020-01-11	2	-1/+16
\| \| \| \|	fix #9
*	feat(gpio): add pinState() method	Uri Shaked	2020-01-08	3	-4/+69
\| \| \| \|	close #8
*	refactor: tslint → eslint	Uri Shaked	2019-12-07	5	-10/+13
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*	feat(usart): add onLineTransmit callback	Uri Shaked	2019-12-07	2	-0/+56
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*	test(usart): more USART tests	Uri Shaked	2019-12-07	2	-1/+57
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*	feat: add benchmarking code	Uri Shaked	2019-12-01	1	-15/+15
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*	feat: initial implementation of USART	Uri Shaked	2019-12-01	3	-0/+180
\| \| \| \|	#6
*	fix: Wrong prescaler for Timer2	Uri Shaked	2019-11-30	2	-6/+44
\| \| \| \|	fix #5
*	feat: Output Compare for Timers	Uri Shaked	2019-11-30	2	-6/+185
\| \| \| \|	close #4
*	feat: add more GPIO ports	Uri Shaked	2019-11-30	2	-1/+57
\| \| \| \|	close #3
*	fix: SP not initialized on reset	Uri Shaked	2019-11-27	4	-2/+28
\| \| \| \|	close #2
*	feat: GPIO peripheral implementation	Uri Shaked	2019-11-25	4	-2/+126
\| \| \| \|	Add new AVRIOPort class, implements GPIO output logic
*	feat: initial timer implementation	Uri Shaked	2019-11-21	3	-0/+232
\| \| \| \| \| \| \|	8-bit timers basic functionality + tests: 1. basic counting + prescaler 2. timer overflow 3. timer overflow interrupt
*	doc: add comment to interrupt.ts	Uri Shaked	2019-11-21	1	-0/+8
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*	feat: implement avrInterrupt()	Uri Shaked	2019-11-21	3	-0/+30
\| \| \| \|	used to invoke hardware interrupt
*	test: SWAP, STS	Uri Shaked	2019-11-20	1	-1/+19
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*	fix: SREG issues in ADC, CPC, SBC, SBCI	Uri Shaked	2019-11-20	2	-10/+52
\| \| \| \|	also added regression test cases
*	feat: implement most instructions	Uri Shaked	2019-11-20	2	-113/+455
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*	feat: LPM, LSR, MOV, MOVW, MUL, MULS, MULSU, NEG	Uri Shaked	2019-11-20	2	-19/+195
\| \| \| \|	+ tests
*	feat: LAC, LAS, LAT, LDS instructions + tests	Uri Shaked	2019-11-20	2	-4/+66
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*	feat: more instructions	Uri Shaked	2019-11-20	2	-15/+140
\| \| \| \| \|	implement ADC, ADD, ADIW, AND, ANDI, ASR, BCLR, BLD, BRBC, BRBS, test some of them
*	feat: CALL, INC, RET, RETI, ROR instructions	Uri Shaked	2019-11-19	2	-14/+106
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