From 620b1f5872957518d758a6e0ca055d038bbfbeda Mon Sep 17 00:00:00 2001
From: Uri Shaked
Date: Sat, 30 Nov 2019 20:05:43 +0200
Subject: fix: Wrong prescaler for Timer2

fix #5
---
 src/timer.spec.ts | 15 ++++++++++++++-
 src/timer.ts      | 35 ++++++++++++++++++++++++++++++-----
 2 files changed, 44 insertions(+), 6 deletions(-)

diff --git a/src/timer.spec.ts b/src/timer.spec.ts
index dd45cee..4d631a7 100644
--- a/src/timer.spec.ts
+++ b/src/timer.spec.ts
@@ -1,5 +1,5 @@
 import { CPU } from './cpu';
-import { AVRTimer, timer0Config } from './timer';
+import { AVRTimer, timer0Config, timer2Config } from './timer';
 
 describe('timer', () => {
   let cpu: CPU;
@@ -188,4 +188,17 @@ describe('timer', () => {
     expect(cpu.pc).toEqual(0x1e);
     expect(cpu.cycles).toEqual(3);
   });
+
+  it('timer2 should count every 256 ticks when prescaler is 6 (issue #5)', () => {
+    const timer = new AVRTimer(cpu, timer2Config);
+    cpu.data[0xb1] = 0x6; // TCCR1B.CS <- 6
+
+    cpu.cycles = 511;
+    timer.tick();
+    expect(cpu.data[0xb2]).toEqual(1); // TCNT2 should be 2
+
+    cpu.cycles = 512;
+    timer.tick();
+    expect(cpu.data[0xb2]).toEqual(2); // TCNT2 should be 2
+  });
 });
diff --git a/src/timer.ts b/src/timer.ts
index 1406eda..ac82ce8 100644
--- a/src/timer.ts
+++ b/src/timer.ts
@@ -9,7 +9,7 @@
 import { CPU } from './cpu';
 import { avrInterrupt } from './interrupt';
 
-const dividers = {
+const timer01Dividers = {
   0: 0,
   1: 1,
   2: 8,
@@ -35,6 +35,17 @@ const OCIEB = 4;
 
 type u8 = number;
 
+interface ITimerDividers {
+  0: number;
+  1: number;
+  2: number;
+  3: number;
+  4: number;
+  5: number;
+  6: number;
+  7: number;
+}
+
 interface AVRTimerConfig {
   bits: 8 | 16;
   captureInterrupt: u8;
@@ -52,6 +63,8 @@ interface AVRTimerConfig {
   TCCRB: u8;
   TCCRC: u8;
   TIMSK: u8;
+
+  dividers: ITimerDividers;
 }
 
 export const timer0Config: AVRTimerConfig = {
@@ -68,7 +81,8 @@ export const timer0Config: AVRTimerConfig = {
   TCCRA: 0x44,
   TCCRB: 0x45,
   TCCRC: 0, // not available
-  TIMSK: 0x6e
+  TIMSK: 0x6e,
+  dividers: timer01Dividers
 };
 
 export const timer1Config: AVRTimerConfig = {
@@ -85,7 +99,8 @@ export const timer1Config: AVRTimerConfig = {
   TCCRA: 0x80,
   TCCRB: 0x81,
   TCCRC: 0x82,
-  TIMSK: 0x6f
+  TIMSK: 0x6f,
+  dividers: timer01Dividers
 };
 
 export const timer2Config: AVRTimerConfig = {
@@ -102,7 +117,17 @@ export const timer2Config: AVRTimerConfig = {
   TCCRA: 0xb0,
   TCCRB: 0xb1,
   TCCRC: 0, // not available
-  TIMSK: 0x70
+  TIMSK: 0x70,
+  dividers: {
+    0: 1,
+    1: 1,
+    2: 8,
+    3: 32,
+    4: 64,
+    5: 128,
+    6: 256,
+    7: 1024
+  }
 };
 
 export class AVRTimer {
@@ -169,7 +194,7 @@ export class AVRTimer {
   }
 
   tick() {
-    const divider = dividers[this.CS];
+    const divider = this.config.dividers[this.CS];
     const delta = this.cpu.cycles - this.lastCycle;
     if (divider && delta >= divider) {
       const counterDelta = Math.floor(delta / divider);
-- 
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