From 69589b07e47219b7673dc9919fb6fa3fcd0c4d54 Mon Sep 17 00:00:00 2001 From: Uri Shaked Date: Sat, 14 Feb 2026 19:25:24 +0200 Subject: style: organize imports Also remove unused eslint-disable directives --- src/cpu/cpu.ts | 3 +-- src/cpu/instruction.spec.ts | 4 ++-- src/cpu/instruction.ts | 2 +- 3 files changed, 4 insertions(+), 5 deletions(-) (limited to 'src/cpu') diff --git a/src/cpu/cpu.ts b/src/cpu/cpu.ts index 62ff40a..4065b0a 100644 --- a/src/cpu/cpu.ts +++ b/src/cpu/cpu.ts @@ -9,7 +9,7 @@ */ import { AVRIOPort } from '../peripherals/gpio'; -import { u32, u16, u8, i16 } from '../types'; +import { i16, u16, u32, u8 } from '../types'; import { avrInterrupt } from './interrupt'; const registerSpace = 0x100; @@ -262,7 +262,6 @@ export class CPU { const { nextInterrupt } = this; if (this.interruptsEnabled && nextInterrupt >= 0) { - // eslint-disable-next-line @typescript-eslint/no-non-null-assertion const interrupt = this.pendingInterrupts[nextInterrupt]!; avrInterrupt(this, interrupt.address); if (!interrupt.constant) { diff --git a/src/cpu/instruction.spec.ts b/src/cpu/instruction.spec.ts index aa01876..181b2fa 100644 --- a/src/cpu/instruction.spec.ts +++ b/src/cpu/instruction.spec.ts @@ -1,10 +1,10 @@ // SPDX-License-Identifier: MIT // Copyright (c) Uri Shaked and contributors +import { beforeEach, describe, expect, it, vi } from 'vitest'; +import { assemble } from '../utils/assembler'; import { CPU } from './cpu'; import { avrInstruction } from './instruction'; -import { assemble } from '../utils/assembler'; -import { describe, it, expect, vi, beforeEach } from 'vitest'; const r0 = 0; const r1 = 1; diff --git a/src/cpu/instruction.ts b/src/cpu/instruction.ts index d815733..77f27ba 100644 --- a/src/cpu/instruction.ts +++ b/src/cpu/instruction.ts @@ -13,8 +13,8 @@ * Copyright (C) 2019, 2020 Uri Shaked */ -import { CPU } from './cpu'; import { u16 } from '../types'; +import { CPU } from './cpu'; function isTwoWordInstruction(opcode: u16) { return ( -- cgit v1.2.3