From 9b399811c07cc2ab881abacf6ca35107fc6bc658 Mon Sep 17 00:00:00 2001 From: Uri Shaked Date: Mon, 25 Nov 2019 22:03:40 +0200 Subject: feat: GPIO peripheral implementation Add new AVRIOPort class, implements GPIO output logic --- src/gpio.spec.ts | 40 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) create mode 100644 src/gpio.spec.ts (limited to 'src/gpio.spec.ts') diff --git a/src/gpio.spec.ts b/src/gpio.spec.ts new file mode 100644 index 0000000..03ebb84 --- /dev/null +++ b/src/gpio.spec.ts @@ -0,0 +1,40 @@ +import { CPU } from './cpu'; +import { AVRIOPort, portBConfig } from './gpio'; + +describe('GPIO', () => { + it('should invoke the listeners when the port is written to', () => { + const cpu = new CPU(new Uint16Array(1024)); + const port = new AVRIOPort(cpu, portBConfig); + const listener = jest.fn(); + port.addListener(listener); + cpu.writeData(0x24, 0x0f); // DDRB <- 0x0f + cpu.writeData(0x25, 0x55); // PORTB <- 0x55 + expect(listener).toHaveBeenCalledWith(0x05, 0); + expect(cpu.data[0x23]).toEqual(0x5); // PINB should return port value + }); + + it('should toggle the pin when writing to the PIN register', () => { + const cpu = new CPU(new Uint16Array(1024)); + const port = new AVRIOPort(cpu, portBConfig); + const listener = jest.fn(); + port.addListener(listener); + cpu.writeData(0x24, 0x0f); // DDRB <- 0x0f + cpu.writeData(0x25, 0x55); // PORTB <- 0x55 + cpu.writeData(0x23, 0x01); // PINB <- 0x0f + expect(listener).toHaveBeenCalledWith(0x04, 0x5); + expect(cpu.data[0x23]).toEqual(0x4); // PINB should return port value + }); + + describe('removeListener', () => { + it('should remove the given listener', () => { + const cpu = new CPU(new Uint16Array(1024)); + const port = new AVRIOPort(cpu, portBConfig); + const listener = jest.fn(); + port.addListener(listener); + cpu.writeData(0x24, 0x0f); // DDRB <- 0x0f + port.removeListener(listener); + cpu.writeData(0x25, 0x99); // PORTB <- 0x99 + expect(listener).not.toHaveBeenCalled(); + }); + }); +}); -- cgit v1.2.3