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| author | Apexo | 2026-03-29 11:29:23 +0200 |
|---|---|---|
| committer | Apexo | 2026-03-29 11:29:29 +0200 |
| commit | 3e557eb872547c944430e77054643edc9d3582bb (patch) | |
| tree | 78ef4505e248d3cc708477c2be1dc357f63a55c5 | |
| parent | fix comments (diff) | |
| download | anduril-sim-3e557eb872547c944430e77054643edc9d3582bb.tar.gz anduril-sim-3e557eb872547c944430e77054643edc9d3582bb.tar.bz2 anduril-sim-3e557eb872547c944430e77054643edc9d3582bb.zip | |
unify import stlyle
Diffstat (limited to '')
| -rw-r--r-- | src/peripherals/avrdx-adc.ts | 4 | ||||
| -rw-r--r-- | src/peripherals/avrdx-clkctrl.ts | 4 | ||||
| -rw-r--r-- | src/peripherals/avrdx-rstctrl.ts | 4 | ||||
| -rw-r--r-- | src/peripherals/avrdx-wdt.ts | 2 |
4 files changed, 7 insertions, 7 deletions
diff --git a/src/peripherals/avrdx-adc.ts b/src/peripherals/avrdx-adc.ts index 34a6f24..dc95d86 100644 --- a/src/peripherals/avrdx-adc.ts +++ b/src/peripherals/avrdx-adc.ts @@ -1,8 +1,8 @@ // AVR-Dx ADC0 peripheral // 12-bit ADC with accumulation, free-running mode, and multiple input sources. -import { type CPU, type AVRInterruptConfig } from 'avr8js/cpu/cpu'; -import { type AVRDxVREF } from './avrdx-vref'; +import type { CPU, AVRInterruptConfig } from 'avr8js/cpu/cpu'; +import type { AVRDxVREF } from './avrdx-vref'; const CTRLA = 0x0000; const CTRLB = 0x0001; diff --git a/src/peripherals/avrdx-clkctrl.ts b/src/peripherals/avrdx-clkctrl.ts index 91d081b..65721b6 100644 --- a/src/peripherals/avrdx-clkctrl.ts +++ b/src/peripherals/avrdx-clkctrl.ts @@ -1,8 +1,8 @@ // AVR-Dx CLKCTRL peripheral // Clock controller with CCP-protected writes. -import { type CPU } from 'avr8js/cpu/cpu'; -import { type AVRDxCCP } from './avrdx-ccp'; +import type { CPU } from 'avr8js/cpu/cpu'; +import type { AVRDxCCP } from './avrdx-ccp'; const MCLKCTRLA = 0x00; const MCLKCTRLB = 0x01; diff --git a/src/peripherals/avrdx-rstctrl.ts b/src/peripherals/avrdx-rstctrl.ts index ce02552..7c1c160 100644 --- a/src/peripherals/avrdx-rstctrl.ts +++ b/src/peripherals/avrdx-rstctrl.ts @@ -1,8 +1,8 @@ // AVR-Dx RSTCTRL - Reset Controller // Handles software reset and reset flags. -import { type CPU } from 'avr8js/cpu/cpu'; -import { type AVRDxCCP } from './avrdx-ccp'; +import type { CPU } from 'avr8js/cpu/cpu'; +import type { AVRDxCCP } from './avrdx-ccp'; const RSTFR = 0; const SWRR = 1; diff --git a/src/peripherals/avrdx-wdt.ts b/src/peripherals/avrdx-wdt.ts index 08cd308..f657fcb 100644 --- a/src/peripherals/avrdx-wdt.ts +++ b/src/peripherals/avrdx-wdt.ts @@ -1,7 +1,7 @@ // AVR-Dx SLPCTRL - Sleep Controller // Handles the SLEEP instruction by fast-forwarding to the next clock event. -import { type CPU } from 'avr8js/cpu/cpu'; +import type { CPU } from 'avr8js/cpu/cpu'; // const CTRLA = 0; // const STATUS = 1; |
