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| author | Apexo | 2026-03-29 11:29:23 +0200 |
|---|---|---|
| committer | Apexo | 2026-03-29 11:29:29 +0200 |
| commit | 3e557eb872547c944430e77054643edc9d3582bb (patch) | |
| tree | 78ef4505e248d3cc708477c2be1dc357f63a55c5 /src/peripherals/avrdx-clkctrl.ts | |
| parent | fix comments (diff) | |
| download | anduril-sim-3e557eb872547c944430e77054643edc9d3582bb.tar.gz anduril-sim-3e557eb872547c944430e77054643edc9d3582bb.tar.bz2 anduril-sim-3e557eb872547c944430e77054643edc9d3582bb.zip | |
unify import stlyle
Diffstat (limited to '')
| -rw-r--r-- | src/peripherals/avrdx-clkctrl.ts | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/peripherals/avrdx-clkctrl.ts b/src/peripherals/avrdx-clkctrl.ts index 91d081b..65721b6 100644 --- a/src/peripherals/avrdx-clkctrl.ts +++ b/src/peripherals/avrdx-clkctrl.ts @@ -1,8 +1,8 @@ // AVR-Dx CLKCTRL peripheral // Clock controller with CCP-protected writes. -import { type CPU } from 'avr8js/cpu/cpu'; -import { type AVRDxCCP } from './avrdx-ccp'; +import type { CPU } from 'avr8js/cpu/cpu'; +import type { AVRDxCCP } from './avrdx-ccp'; const MCLKCTRLA = 0x00; const MCLKCTRLB = 0x01; |