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| author | Gabriel Hart | 2021-08-20 09:48:04 -0500 |
|---|---|---|
| committer | Gabriel Hart | 2021-08-20 09:48:04 -0500 |
| commit | 02d197fdf6d6294e3aeb392f427c5acc3a0c475d (patch) | |
| tree | d40717830cd78f1c6f7fbeb4e07ba5d1c087463a | |
| parent | Adjusted more Sofirn SP10 config values (party strobe, candle amp, max_1x7135) (diff) | |
| download | anduril-02d197fdf6d6294e3aeb392f427c5acc3a0c475d.tar.gz anduril-02d197fdf6d6294e3aeb392f427c5acc3a0c475d.tar.bz2 anduril-02d197fdf6d6294e3aeb392f427c5acc3a0c475d.zip | |
from Tom E, support PB4 for any of the 3 PWM channels
| -rw-r--r-- | spaghetti-monster/fsm-main.c | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/spaghetti-monster/fsm-main.c b/spaghetti-monster/fsm-main.c index f3c319c..2015563 100644 --- a/spaghetti-monster/fsm-main.c +++ b/spaghetti-monster/fsm-main.c @@ -46,17 +46,28 @@ static inline void hw_setup() { DDRB |= (1 << PWM1_PIN); TCCR0B = 0x01; // pre-scaler for timer (1 => 1, 2 => 8, 3 => 64...) TCCR0A = PHASE; + #if (PWM1_PIN == PB4) // Second PWM counter is ... weird + TCCR1 = _BV (CS10); + GTCCR = _BV (COM1B1) | _BV (PWM1B); + OCR1C = 255; // Set ceiling value to maximum + #endif #endif #if PWM_CHANNELS >= 2 DDRB |= (1 << PWM2_PIN); + #if (PWM2_PIN == PB4) // Second PWM counter is ... weird + TCCR1 = _BV (CS10); + GTCCR = _BV (COM1B1) | _BV (PWM1B); + OCR1C = 255; // Set ceiling value to maximum + #endif #endif #if PWM_CHANNELS >= 3 - // Second PWM counter is ... weird DDRB |= (1 << PWM3_PIN); + #if (PWM3_PIN == PB4) // Second PWM counter is ... weird TCCR1 = _BV (CS10); GTCCR = _BV (COM1B1) | _BV (PWM1B); OCR1C = 255; // Set ceiling value to maximum #endif + #endif #if PWM_CHANNELS >= 4 // 4th PWM channel is ... not actually supported in hardware :( DDRB |= (1 << PWM4_PIN); |