converted FW3A to new API

(my FW3A dev host is dead though, so the DD FET channel
 isn't 100% confirmed to work ... will have to solder together
 a new dev host at some point)

6 files changed, 214 insertions, 61 deletions

diff --git a/hwdef-FW3A.h b/hwdef-FW3A.h
deleted file mode 100644
index f2b5c8d..0000000
--- a/hwdef-FW3A.h
+++ /dev/null
@@ -1,51 +0,0 @@
-// BLF/TLF FW3A driver layout
-// Copyright (C) 2018-2023 Selene ToyKeeper
-// SPDX-License-Identifier: GPL-3.0-or-later
-#pragma once
-
-/*
- *           ----
- *   Reset -|1  8|- VCC
- * eswitch -|2  7|- optic nerve
- *     FET -|3  6|- 7x7135
- *     GND -|4  5|- 1x7135
- *           ----
- */
-
-#define PWM_CHANNELS 3
-
-#ifndef SWITCH_PIN
-#define SWITCH_PIN   PB3    // pin 2
-#define SWITCH_PCINT PCINT3 // pin 2 pin change interrupt
-#endif
-
-#ifndef PWM1_PIN
-#define PWM1_PIN PB0        // pin 5, 1x7135 PWM
-#define PWM1_LVL OCR0A      // OCR0A is the output compare register for PB0
-#endif
-#ifndef PWM2_PIN
-#define PWM2_PIN PB1        // pin 6, 7x7135 PWM
-#define PWM2_LVL OCR0B      // OCR0B is the output compare register for PB1
-#endif
-#ifndef PWM3_PIN
-#define PWM3_PIN PB4        // pin 3, FET PWM
-#define PWM3_LVL OCR1B      // OCR1B is the output compare register for PB4
-#endif
-
-#ifndef VISION_PIN
-#define VISION_PIN PB2      // pin 7, optic nerve
-//#define ADC_CHANNEL 0x01    // MUX 01 corresponds with PB2
-//#define ADC_DIDR    ADC1D   // Digital input disable bit corresponding with PB2
-#endif
-#define ADC_PRSCL   0x07    // clk/128
-
-// average drop across diode on this hardware
-#ifndef VOLTAGE_FUDGE_FACTOR
-#define VOLTAGE_FUDGE_FACTOR 5  // add 0.25V
-#endif
-
-#define FAST 0xA3           // fast PWM both channels
-#define PHASE 0xA1          // phase-correct PWM both channels
-
-#define LAYOUT_DEFINED
-
diff --git a/hwdef-fw3a.c b/hwdef-fw3a.c
new file mode 100644
index 0000000..b20969d
--- /dev/null
+++ b/hwdef-fw3a.c
@@ -0,0 +1,71 @@
+// BLF/TLF FW3A PWM helper functions
+// Copyright (C) 2019-2023 Selene ToyKeeper
+// SPDX-License-Identifier: GPL-3.0-or-later
+#pragma once
+
+void set_level_zero();
+
+void set_level_main(uint8_t level);
+bool gradual_tick_main(uint8_t gt);
+
+
+Channel channels[] = {
+    { // main LEDs
+        .set_level    = set_level_main,
+        .gradual_tick = gradual_tick_main
+    },
+};
+
+
+void set_level_zero() {
+    CH1_PWM = 0;
+    CH2_PWM = 0;
+    #ifdef CH3_PIN
+        CH3_PWM = 0;
+    #endif
+}
+
+// TODO: implement delta-sigma modulation for better low modes
+
+// single set of LEDs with 3 stacked power channels, FET+N+1
+// (or just use N+1 on the no-FET model or FET+1 model)
+void set_level_main(uint8_t level) {
+    PWM_DATATYPE ch1_pwm = PWM_GET(pwm1_levels, level);
+    PWM_DATATYPE ch2_pwm = PWM_GET(pwm2_levels, level);
+    #ifdef CH3_PIN
+        PWM_DATATYPE ch3_pwm = PWM_GET(pwm3_levels, level);
+    #endif
+
+    CH1_PWM = ch1_pwm;
+    CH2_PWM = ch2_pwm;
+    #ifdef CH3_PIN
+        CH3_PWM = ch3_pwm;
+    #endif
+}
+
+bool gradual_tick_main(uint8_t gt) {
+    PWM_DATATYPE pwm1 = PWM_GET(pwm1_levels, gt);
+    PWM_DATATYPE pwm2 = PWM_GET(pwm2_levels, gt);
+    #ifdef CH3_PIN
+        PWM_DATATYPE pwm3 = PWM_GET(pwm3_levels, gt);
+    #endif
+
+    GRADUAL_ADJUST_STACKED(pwm1, CH1_PWM, PWM_TOP_INIT);
+    #ifdef CH3_PIN
+        GRADUAL_ADJUST_STACKED(pwm2, CH2_PWM, PWM_TOP_INIT);
+        GRADUAL_ADJUST_SIMPLE (pwm3, CH3_PWM);
+    #else
+        GRADUAL_ADJUST_SIMPLE (pwm2, CH2_PWM);
+    #endif
+
+    if (   (pwm1 == CH1_PWM)
+        && (pwm2 == CH2_PWM)
+        #ifdef CH3_PIN
+            && (pwm3 == CH3_PWM)
+        #endif
+       ) {
+        return true;  // done
+    }
+    return false;  // not done yet
+}
+
diff --git a/hwdef-fw3a.h b/hwdef-fw3a.h
new file mode 100644
index 0000000..519fb97
--- /dev/null
+++ b/hwdef-fw3a.h
@@ -0,0 +1,105 @@
+// BLF/TLF FW3A driver layout
+// Copyright (C) 2018-2023 Selene ToyKeeper
+// SPDX-License-Identifier: GPL-3.0-or-later
+#pragma once
+
+/*
+ *           ----
+ *   Reset -|1  8|- VCC
+ * eswitch -|2  7|- optic nerve
+ *     FET -|3  6|- 7x7135
+ *     GND -|4  5|- 1x7135
+ *           ----
+ */
+
+#define ATTINY 85
+#include <avr/io.h>
+
+#define HWDEF_C_FILE hwdef-fw3a.c
+
+// channel modes
+// * 0. FET+7+1 stacked
+#define NUM_CHANNEL_MODES   1
+enum CHANNEL_MODES {
+    CM_MAIN = 0,
+};
+
+#define DEFAULT_CHANNEL_MODE  CM_MAIN
+
+// right-most bit first, modes are in fedcba9876543210 order
+#define CHANNEL_MODES_ENABLED 0b00000001
+
+
+#define PWM_CHANNELS 3  // old, remove this
+
+#define PWM_BITS      8       // attiny85 only supports up to 8 bits
+#define PWM_GET       PWM_GET8
+#define PWM_DATATYPE  uint8_t
+#define PWM_DATATYPE2 uint16_t
+#define PWM1_DATATYPE uint8_t   // 1x7135 ramp
+#define PWM2_DATATYPE uint8_t   // 7x7135 ramp
+#define PWM3_DATATYPE uint8_t   // DD FET ramp
+
+#define PWM_TOP_INIT  255    // highest value used in top half of ramp
+
+// 1x7135 channel
+#define CH1_PIN  PB0        // pin 5, 1x7135 PWM
+#define CH1_PWM  OCR0A      // OCR0A is the output compare register for PB0
+
+// 7x7135 channel
+#define CH2_PIN  PB1        // pin 6, 7x7135 PWM
+#define CH2_PWM  OCR0B      // OCR0B is the output compare register for PB1
+
+// DD FET channel
+#define CH3_PIN  PB4        // pin 3, FET PWM
+#define CH3_PWM  OCR1B      // OCR1B is the output compare register for PB4
+
+// e-switch
+#ifndef SWITCH_PIN
+#define SWITCH_PIN   PB3    // pin 2
+#define SWITCH_PCINT PCINT3 // pin 2 pin change interrupt
+#endif
+
+#ifndef VISION_PIN
+#define VISION_PIN PB2      // pin 7, optic nerve
+//#define ADC_CHANNEL 0x01    // MUX 01 corresponds with PB2
+//#define ADC_DIDR    ADC1D   // Digital input disable bit corresponding with PB2
+#endif
+#define ADC_PRSCL   0x07    // clk/128
+
+// average drop across diode on this hardware
+#ifndef VOLTAGE_FUDGE_FACTOR
+#define VOLTAGE_FUDGE_FACTOR 5  // add 0.25V
+#endif
+
+#define FAST 0xA3           // fast PWM both channels
+#define PHASE 0xA1          // phase-correct PWM both channels
+
+
+inline void hwdef_setup() {
+
+    // configure PWM channels
+    DDRB = (1 << CH1_PIN)
+         | (1 << CH2_PIN)
+         | (1 << CH3_PIN);
+
+    // configure PWM channels
+    TCCR0B = 0x01; // pre-scaler for timer (1 => 1, 2 => 8, 3 => 64...)
+    TCCR0A = PHASE;
+
+    // Second PWM counter is ... weird
+    TCCR1 = _BV (CS10);
+    GTCCR = _BV (COM1B1) | _BV (PWM1B);
+    OCR1C = PWM_TOP_INIT;  // Set ceiling value to maximum
+
+    // configure e-switch
+    PORTB = (1 << SWITCH_PIN);  // e-switch is the only input
+    PCMSK = (1 << SWITCH_PIN);  // pin change interrupt uses this pin
+
+    // TODO: set up the vision pin
+
+}
+
+
+#define LAYOUT_DEFINED
+
diff --git a/spaghetti-monster/anduril/cfg-fw3a-219.h b/spaghetti-monster/anduril/cfg-fw3a-219.h
index 88739bf..0bd5250 100644
--- a/spaghetti-monster/anduril/cfg-fw3a-219.h
+++ b/spaghetti-monster/anduril/cfg-fw3a-219.h
@@ -13,3 +13,4 @@
 #define PWM1_LEVELS 1,1,2,2,3,3,4,4,5,6,7,8,9,10,12,13,14,15,17,19,20,22,24,26,29,31,34,36,39,42,45,48,51,55,59,62,66,70,75,79,84,89,93,99,104,110,115,121,127,134,140,147,154,161,168,176,184,192,200,209,217,226,236,245,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255
 #define PWM2_LEVELS 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,2,4,6,8,10,13,15,17,19,22,24,26,29,31,34,37,39,42,45,48,51,54,57,60,64,67,70,74,77,81,85,88,92,96,100,104,108,112,116,121,125,130,134,139,143,148,153,158,163,168,173,179,184,189,195,201,206,212,218,224,230,236,243,249,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255
 #define PWM3_LEVELS 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,8,13,19,25,30,36,42,48,54,61,67,73,80,86,93,100,107,114,120,128
+
diff --git a/spaghetti-monster/anduril/cfg-fw3a-nofet.h b/spaghetti-monster/anduril/cfg-fw3a-nofet.h
index e828ac5..b5d4166 100644
--- a/spaghetti-monster/anduril/cfg-fw3a-nofet.h
+++ b/spaghetti-monster/anduril/cfg-fw3a-nofet.h
@@ -9,8 +9,8 @@
 
 // don't use channel 3 (FET)
 #undef PWM_CHANNELS
-#undef PWM3_PIN
-#undef PWM3_LVL
+#undef CH3_PIN
+#undef CH3_PWM
 #define PWM_CHANNELS 2
 
 // reconfigure the ramp
@@ -22,8 +22,9 @@
 #define PWM2_LEVELS 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,3,4,5,7,8,9,11,12,14,15,17,19,20,22,24,25,27,29,31,33,35,37,39,41,43,45,48,50,52,55,57,59,62,64,67,70,72,75,78,81,84,87,90,93,96,99,102,105,109,112,115,119,122,126,129,133,137,141,144,148,152,156,160,165,169,173,177,182,186,191,195,200,205,209,214,219,224,229,234,239,244,250,255
 #undef MAX_1x7135
 #define MAX_1x7135 65
+#undef MAX_Nx7135
 #undef HALFSPEED_LEVEL
-#define HALFSPEED_LEVEL 14
+#define HALFSPEED_LEVEL 15
 #undef QUARTERSPEED_LEVEL
 #define QUARTERSPEED_LEVEL 6
 
@@ -45,3 +46,9 @@
 #undef SIMPLE_UI_CEIL
 #define SIMPLE_UI_CEIL 120
 
+#undef THERM_FASTER_LEVEL
+#define THERM_FASTER_LEVEL 130
+
+// without the 3rd channel, extra features can fit
+#define USE_TACTICAL_MODE
+
diff --git a/spaghetti-monster/anduril/cfg-fw3a.h b/spaghetti-monster/anduril/cfg-fw3a.h
index f75fe13..7a8f417 100644
--- a/spaghetti-monster/anduril/cfg-fw3a.h
+++ b/spaghetti-monster/anduril/cfg-fw3a.h
@@ -4,31 +4,51 @@
 #pragma once
 
 #define MODEL_NUMBER "0311"
-#include "hwdef-FW3A.h"
+#include "hwdef-fw3a.h"
+
+#define RAMP_SIZE 150
 
 // ../../bin/level_calc.py 1 65 7135 1 0.8 150
 // ... mixed with this:
 // ../../../bin/level_calc.py 3 150 7135 1 0.33 150 7135 1 1 850 FET 1 10 1500
-#define RAMP_LENGTH 150
 #define PWM1_LEVELS 1,1,2,2,3,3,4,4,5,6,7,8,9,10,12,13,14,15,17,19,20,22,24,26,29,31,34,36,39,42,45,48,51,55,59,62,66,70,75,79,84,89,93,99,104,110,115,121,127,134,140,147,154,161,168,176,184,192,200,209,217,226,236,245,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,0
 #define PWM2_LEVELS 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,2,4,6,8,10,13,15,17,19,22,24,26,29,31,34,37,39,42,45,48,51,54,57,60,64,67,70,74,77,81,85,88,92,96,100,104,108,112,116,121,125,130,134,139,143,148,153,158,163,168,173,179,184,189,195,201,206,212,218,224,230,236,243,249,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,0
 #define PWM3_LEVELS 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,8,19,31,43,55,67,79,91,104,117,130,143,157,170,184,198,212,226,240,255
+
+#define DEFAULT_LEVEL 50
 #define MAX_1x7135 65
 #define MAX_Nx7135 130
-#define HALFSPEED_LEVEL 14
-#define QUARTERSPEED_LEVEL 5
+#define HALFSPEED_LEVEL 15
+#define QUARTERSPEED_LEVEL 6
+
+#define RAMP_SMOOTH_FLOOR 1
+#define RAMP_SMOOTH_CEIL  MAX_Nx7135
+// 10, 30, 50, [70], 90, 110, 130
+#define RAMP_DISCRETE_FLOOR 10
+#define RAMP_DISCRETE_CEIL  RAMP_SMOOTH_CEIL
+#define RAMP_DISCRETE_STEPS 7
 
 // safe limit ~20% power
 // 20 40 60 80 100
-#define SIMPLE_UI_FLOOR RAMP_DISCRETE_FLOOR
-#define SIMPLE_UI_CEIL 100
-#define SIMPLE_UI_STEPS 5
+#define SIMPLE_UI_FLOOR  20
+#define SIMPLE_UI_CEIL   100
+#define SIMPLE_UI_STEPS  5
 
 // stop panicking at about 3A or ~1100 lm, this light is a hotrod
 #define THERM_FASTER_LEVEL MAX_Nx7135
 
+// don't blink during ramp
+#define BLINK_AT_RAMP_CEIL
+#undef BLINK_AT_RAMP_MIDDLE
+#undef BLINK_AT_RAMP_FLOOR
+
+// enable extra features
+#define USE_SMOOTH_STEPS
+
 // can't reset the normal way because power is connected before the button
 #define USE_SOFT_FACTORY_RESET
 
 // too big, turn off extra features
 #undef USE_TACTICAL_MODE
+#undef USE_SOS_MODE
+