switched to a pseudo-rolling-average method to reduce noise, set prescaler back to 64

10 files changed, 22 insertions, 17 deletions

diff --git a/hwdef-BLF_GT.h b/hwdef-BLF_GT.h
index f0ac103..01dbdbd 100644
--- a/hwdef-BLF_GT.h
+++ b/hwdef-BLF_GT.h
@@ -40,7 +40,7 @@
 // 1.1V reference, no left-adjust, ADC1/PB2
 #define ADMUX_VOLTAGE_DIVIDER ((1 << V_REF) | VOLTAGE_CHANNEL)
 #endif
-#define ADC_PRSCL   0x07    // clk/128
+#define ADC_PRSCL   0x06    // clk/64
 
 // Raw ADC readings at 4.4V and 2.2V (in-between, we assume values form a straight line)
 #ifndef ADC_44
diff --git a/hwdef-Emisar_D18.h b/hwdef-Emisar_D18.h
index 3046143..638dadb 100644
--- a/hwdef-Emisar_D18.h
+++ b/hwdef-Emisar_D18.h
@@ -33,7 +33,7 @@
 #ifndef AUXLED_PIN
 #define AUXLED_PIN PB2      // pin 7
 #endif
-#define ADC_PRSCL   0x07    // clk/128
+#define ADC_PRSCL   0x06    // clk/64
 
 // average drop across diode on this hardware
 #ifndef VOLTAGE_FUDGE_FACTOR
diff --git a/hwdef-Emisar_D4.h b/hwdef-Emisar_D4.h
index d3b6802..be499f1 100644
--- a/hwdef-Emisar_D4.h
+++ b/hwdef-Emisar_D4.h
@@ -34,7 +34,7 @@
 //#define VOLTAGE_PIN PB2     // pin 7, voltage ADC
 //#define ADC_CHANNEL 0x01    // MUX 01 corresponds with PB2
 //#define ADC_DIDR    ADC1D   // Digital input disable bit corresponding with PB2
-#define ADC_PRSCL   0x07    // clk/128
+#define ADC_PRSCL   0x06    // clk/64
 
 // average drop across diode on this hardware
 #ifndef VOLTAGE_FUDGE_FACTOR
diff --git a/hwdef-Emisar_D4Sv2.h b/hwdef-Emisar_D4Sv2.h
index 7c3fe86..da3a0ca 100644
--- a/hwdef-Emisar_D4Sv2.h
+++ b/hwdef-Emisar_D4Sv2.h
@@ -52,7 +52,7 @@
 #define PWM3_LVL OCR1B      // OCR1B is the output compare register for PB1
 
 
-#define ADC_PRSCL   0x07    // clk/128
+#define ADC_PRSCL   0x06    // clk/64
 
 // average drop across diode on this hardware
 #ifndef VOLTAGE_FUDGE_FACTOR
diff --git a/hwdef-Emisar_D4v2.h b/hwdef-Emisar_D4v2.h
index 60f3fae..addf429 100644
--- a/hwdef-Emisar_D4v2.h
+++ b/hwdef-Emisar_D4v2.h
@@ -48,7 +48,7 @@
 #define PWM2_LVL OCR1B      // OCR1B is the output compare register for PB1
 
 
-#define ADC_PRSCL   0x07    // clk/128
+#define ADC_PRSCL   0x06    // clk/64
 
 // average drop across diode on this hardware
 #ifndef VOLTAGE_FUDGE_FACTOR
diff --git a/hwdef-FW3A.h b/hwdef-FW3A.h
index a223b08..0b94635 100644
--- a/hwdef-FW3A.h
+++ b/hwdef-FW3A.h
@@ -35,7 +35,7 @@
 //#define ADC_CHANNEL 0x01    // MUX 01 corresponds with PB2
 //#define ADC_DIDR    ADC1D   // Digital input disable bit corresponding with PB2
 #endif
-#define ADC_PRSCL   0x07    // clk/128
+#define ADC_PRSCL   0x06    // clk/64
 
 // average drop across diode on this hardware
 #ifndef VOLTAGE_FUDGE_FACTOR
diff --git a/hwdef-Mateminco_MF01-Mini.h b/hwdef-Mateminco_MF01-Mini.h
index 0fea1e2..6c420d7 100644
--- a/hwdef-Mateminco_MF01-Mini.h
+++ b/hwdef-Mateminco_MF01-Mini.h
@@ -34,7 +34,7 @@
 #define PWM3_LVL OCR1B      // OCR1B is the output compare register for PB4
 #endif
 
-#define ADC_PRSCL   0x07    // clk/128
+#define ADC_PRSCL   0x06    // clk/64
 
 // average drop across diode on this hardware
 #ifndef VOLTAGE_FUDGE_FACTOR
diff --git a/hwdef-Mateminco_MF01S.h b/hwdef-Mateminco_MF01S.h
index b89408f..ab1c5bf 100644
--- a/hwdef-Mateminco_MF01S.h
+++ b/hwdef-Mateminco_MF01S.h
@@ -40,7 +40,7 @@
 // 1.1V reference, no left-adjust, ADC1/PB2
 #define ADMUX_VOLTAGE_DIVIDER ((1 << V_REF) | VOLTAGE_CHANNEL)
 #endif
-#define ADC_PRSCL   0x07    // clk/128
+#define ADC_PRSCL   0x06    // clk/64
 
 // Raw ADC readings at 4.4V and 2.2V (in-between, we assume values form a straight line)
 #ifndef ADC_44
diff --git a/hwdef-TK_Saber.h b/hwdef-TK_Saber.h
index 52ddb4a..3f49d30 100644
--- a/hwdef-TK_Saber.h
+++ b/hwdef-TK_Saber.h
@@ -23,7 +23,7 @@
 #define SWITCH_PIN   PB2    // pin 7
 #define SWITCH_PCINT PCINT2 // pin 7 pin change interrupt
 
-#define ADC_PRSCL   0x07    // clk/128 (no need to be super fast)
+#define ADC_PRSCL   0x06    // clk/64 (no need to be super fast)
 
 // average drop across diode on this hardware
 #define VOLTAGE_FUDGE_FACTOR 5  // add 0.25V
diff --git a/spaghetti-monster/fsm-adc.c b/spaghetti-monster/fsm-adc.c
index c686694..f10114f 100644
--- a/spaghetti-monster/fsm-adc.c
+++ b/spaghetti-monster/fsm-adc.c
@@ -87,7 +87,7 @@ inline void ADC_on()
             //DIDR0 |= (1 << ADC_DIDR);  // FIXME: unsure how to handle for VCC pin
         #endif
         #if (ATTINY == 1634)
-            ACSRA |= (1 << ACD);  // turn off analog comparator to save power
+            //ACSRA |= (1 << ACD);  // turn off analog comparator to save power
             //ADCSRB |= (1 << ADLAR);  // left-adjust flag is here instead of ADMUX
         #endif
         // enable, start, auto-retrigger, prescale
@@ -134,11 +134,11 @@ static inline uint8_t calc_voltage_divider(uint16_t value) {
 #endif
 
 // happens every time the ADC sampler finishes a measurement
-// collects an average of 64 samples, which increases effective number of
-// bits from 10 to about 16 (ish, probably more like 14 really)
-// (64 was chosen because it's the largest sample size which allows the
-// sum to still fit into a 16-bit integer, and for speed and size reasons,
-// we want to avoid doing 32-bit math)
+// collects a rolling average of 64+ samples, which increases effective number
+// of bits from 10 to about 16 (ish, probably more like 14 really) (64 was
+// chosen because it's the largest sample size which allows the sum to still
+// fit into a 16-bit integer, and for speed and size reasons, we want to avoid
+// doing 32-bit math)
 ISR(ADC_vect) {
 
     static uint16_t adc_sum;
@@ -153,8 +153,15 @@ ISR(ADC_vect) {
         return;
     }
     // 64 samples collected, save the result
+    // (actually triggers at 64 and every 32 afterward)
     else if (66 == adc_sample_count) {
+        // save the latest result
         adc_smooth[adc_channel] = adc_sum;
+        // cut sum in half and set up another half-window of samples
+        // (for sort of a continuous average)
+        // (this seems to significantly reduce noise)
+        adc_sum >>= 1;
+        adc_sample_count = 33;
     }
     // add the latest measurement to the pile
     else {
@@ -164,8 +171,6 @@ ISR(ADC_vect) {
         // update the latest value
         adc_raw[adc_channel] = m;
     }
-    // don't worry about the running total overflowing after sample 64...
-    // it doesn't matter
 
     // track what woke us up, and enable deferred logic
     irq_adc = 1;