emisar-d3aa: reduced preflash by changing timing of power enable steps

After testing on every device I can, and getting several users to also
test this, it appears to reduce and sometimes completely eliminate
preflash on most devices... and the cases where it wasn't reported to
help, at least it didn't make things worse.  Some units apparently just
can't get the flash eliminated completely, despite trying lots of things.

Instead of turning the chips on and then waiting 4ms, it now turns the
preflash absorber on, waits ~0.6ms, sets misc params, then turns the
boost chip on, then waits ~0.6ms, then turns the preflash absorber off.

This seems to work best on li-ion power, where on my devices it completely
eliminates any preflash.  There is still a very mild flash on AA though,
which I wasn't able to get rid of.  But it's like... 0.003 lm for just
a few milliseconds, really not bad.  Even in the worst case reported by
a user, based on the video they took, it looks like just 0.01 lm for
a few milliseconds.

1 files changed, 23 insertions, 8 deletions

diff --git a/hw/hank/emisar-d3aa/hwdef.c b/hw/hank/emisar-d3aa/hwdef.c
index be673e1..0ac0ddc 100644
--- a/hw/hank/emisar-d3aa/hwdef.c
+++ b/hw/hank/emisar-d3aa/hwdef.c
@@ -22,15 +22,26 @@ Channel channels[] = {
 };
 
 
+inline void nfet_delay() {
+    #if IN_NFET_DELAY_TIME > 0
+    delay_4ms(IN_NFET_DELAY_TIME/4);
+    #else
+    delay_zero();
+    delay_zero();
+    #endif
+}
+
 void set_level_zero() {
     DAC_LVL  = 0;  // DAC off
     DAC_VREF = V10;  // low Vref
     HDR_ENABLE_PORT &= ~(1 << HDR_ENABLE_PIN);  // HDR off
 
-    // prevent post-off flash
-    IN_NFET_ENABLE_PORT |= (1 << IN_NFET_ENABLE_PIN);
-    delay_4ms(IN_NFET_DELAY_TIME/4);
-    IN_NFET_ENABLE_PORT &= ~(1 << IN_NFET_ENABLE_PIN);
+    if (actual_level) {
+        // prevent post-off flash
+        IN_NFET_ENABLE_PORT |= (1 << IN_NFET_ENABLE_PIN);
+        nfet_delay();
+        IN_NFET_ENABLE_PORT &= ~(1 << IN_NFET_ENABLE_PIN);
+    }
 
     // turn off boost last
     BST_ENABLE_PORT &= ~(1 << BST_ENABLE_PIN);  // BST off
@@ -45,11 +56,9 @@ void set_level_main(uint8_t level) {
     if ((! actual_level) && (level < HDR_ENABLE_LEVEL_MIN)) {
         noflash = 1;
         IN_NFET_ENABLE_PORT |= (1 << IN_NFET_ENABLE_PIN);
+        //nfet_delay();
     }
 
-    // BST on first, to give it a few extra microseconds to spin up
-    BST_ENABLE_PORT |= (1 << BST_ENABLE_PIN);
-
     // pre-load ramp data so it can be assigned faster later
     // DAC level register is left-aligned
     PWM1_DATATYPE dac_lvl  = PWM1_GET(level) << 6;
@@ -66,9 +75,15 @@ void set_level_main(uint8_t level) {
     DAC_LVL  = dac_lvl;
     DAC_VREF = dac_vref;
 
+    // if turning on from off, let things stabilize before enabling power
+    if (noflash) { nfet_delay(); }
+
+    // BST on last, after its inputs are set and stabilized
+    BST_ENABLE_PORT |= (1 << BST_ENABLE_PIN);
+
     if (noflash) {
         // wait for flash prevention to finish
-        delay_4ms(IN_NFET_DELAY_TIME/4);
+        nfet_delay();
         IN_NFET_ENABLE_PORT &= ~(1 << IN_NFET_ENABLE_PIN);
     }
 }