Merge branch 'avr32dd20-devkit' into trunk

Added support for AVR DD MCUs, particularly avr32dd20.  Also did a bunch
of refactoring for how MCU support works, cleaned up the ADC code,
switched to consistent internal formats for voltage and temperature,
fixed the FW3X, and some other little things.

* avr32dd20-devkit: (28 commits)
  eliminated direct CCP register access from arch/attiny1616
  made the avr32dd20 flashing script more universal
  added a build target for FW3X with manually-fixed RGB aux wiring
  prevent future issues like the FW3X had
  fixed FW3X thermal regulation
  fixed incorrect temperature history for a few seconds after waking
  fsm/adc: removed dead code
  FW3X: fixed external temperature sensor
  FW3X: multiple upgrades...
  fw3x: fixed swapped red+blue, fixed battery measurements, added police color strobe
  fixed ADC on sp10-pro
  fixed ADC on attiny85 and related builds
  fixed ADC on attiny1634 and related builds
  more ADC / DAC / MCU progress...
  avr32dd20-devkit: make the defaults a bit more dev friendly (realtime voltage colors, and no simple UI by default)
  ADC voltage: battcheck 3 digits, fixed t1616, switched back to 8-bit internal volt unit
  got ADC voltage+temp working on avrdd... but broke all other builds/MCUs
  1.55V AA battery should not show as "white" voltage color, only purple
  started refactoring fsm/adc.*, but need a checkpoint before continuing
  added dac-scale.py: short script to calculate avrdd DAC+Vref values from level_calc.py ramp data
  ...

1 files changed, 39 insertions, 0 deletions

diff --git a/hw/hank/vdivider-1634.h b/hw/hank/vdivider-1634.h
new file mode 100644
index 0000000..171267d
--- /dev/null
+++ b/hw/hank/vdivider-1634.h
@@ -0,0 +1,39 @@
+// attiny1634 voltage divider common defs
+// Copyright (C) 2020-2023 Selene ToyKeeper
+// SPDX-License-Identifier: GPL-3.0-or-later
+#pragma once
+
+#define USE_VOLTAGE_DIVIDER  // use a dedicated pin, not VCC, because VCC input is flattened
+#define VOLTAGE_PIN        PB1  // Pin 18 / PB1 / ADC6
+// pin to ADC mappings are in DS table 19-4
+#define VOLTAGE_ADC      ADC6D  // digital input disable pin for PB1
+// DIDR0/DIDR1 mappings are in DS section 19.13.5, 19.13.6
+#define VOLTAGE_ADC_DIDR DIDR1  // DIDR channel for ADC6D
+// DS tables 19-3, 19-4
+// Bit   7     6     5      4     3    2    1    0
+//     REFS1 REFS0 REFEN ADC0EN MUX3 MUX2 MUX1 MUX0
+// MUX[3:0] = 0, 1, 1, 0 for ADC6 / PB1
+// divided by ...
+// REFS[1:0] = 1, 0 for internal 1.1V reference
+// other bits reserved
+#define ADMUX_VOLTAGE_DIVIDER  0b10000110
+#undef voltage_raw2cooked
+#define voltage_raw2cooked  mcu_vdivider_raw2cooked
+
+#define ADC_PRSCL   0x07    // clk/128
+
+// Raw ADC readings at 4.4V and 2.2V
+// calibrate the voltage readout here
+// estimated / calculated values are:
+//   (voltage - D1) * (R2/(R2+R1) * 1024 / 1.1)
+// D1, R1, R2 = 0, 330, 100
+#ifndef ADC_44
+//#define ADC_44 (4*981)  // raw value at 4.40V
+#define ADC_44 (4*967)  // manually tweaked so 4.16V will blink out 4.2
+#endif
+#ifndef ADC_22
+//#define ADC_22 (4*489)  // raw value at 2.20V
+#define ADC_22 (4*482)  // manually tweaked so 4.16V will blink out 4.2
+#endif
+
+