Merge branch 'avr32dd20-devkit' into trunk

Added support for AVR DD MCUs, particularly avr32dd20.  Also did a bunch
of refactoring for how MCU support works, cleaned up the ADC code,
switched to consistent internal formats for voltage and temperature,
fixed the FW3X, and some other little things.

* avr32dd20-devkit: (28 commits)
  eliminated direct CCP register access from arch/attiny1616
  made the avr32dd20 flashing script more universal
  added a build target for FW3X with manually-fixed RGB aux wiring
  prevent future issues like the FW3X had
  fixed FW3X thermal regulation
  fixed incorrect temperature history for a few seconds after waking
  fsm/adc: removed dead code
  FW3X: fixed external temperature sensor
  FW3X: multiple upgrades...
  fw3x: fixed swapped red+blue, fixed battery measurements, added police color strobe
  fixed ADC on sp10-pro
  fixed ADC on attiny85 and related builds
  fixed ADC on attiny1634 and related builds
  more ADC / DAC / MCU progress...
  avr32dd20-devkit: make the defaults a bit more dev friendly (realtime voltage colors, and no simple UI by default)
  ADC voltage: battcheck 3 digits, fixed t1616, switched back to 8-bit internal volt unit
  got ADC voltage+temp working on avrdd... but broke all other builds/MCUs
  1.55V AA battery should not show as "white" voltage color, only purple
  started refactoring fsm/adc.*, but need a checkpoint before continuing
  added dac-scale.py: short script to calculate avrdd DAC+Vref values from level_calc.py ramp data
  ...

3 files changed, 32 insertions, 44 deletions

diff --git a/hw/thefreeman/boost21-mp3431-hdr-dac-argb/anduril.h b/hw/thefreeman/boost21-mp3431-hdr-dac-argb/anduril.h
index 64da638..8319d13 100644
--- a/hw/thefreeman/boost21-mp3431-hdr-dac-argb/anduril.h
+++ b/hw/thefreeman/boost21-mp3431-hdr-dac-argb/anduril.h
@@ -3,7 +3,7 @@
 // SPDX-License-Identifier: GPL-3.0-or-later
 #pragma once
 
-#include "thefreeman/boost21-mp3431-hdr-dac-argb/hwdef.h"
+#define HWDEF_H  thefreeman/boost21-mp3431-hdr-dac-argb/hwdef.h
 
 // HPRsense : 1.7+0.3+5 = 7mR (DMN22M5UFG+trace resistance+5mR)
 // Vsense=42.46mV, R1= 191k
@@ -19,15 +19,17 @@
 //   - high 0.55V
 //   - high 2.5V
 // PWM1: DAC Data
-#define PWM1_LEVELS  2,  3,  4,  5,  7,  9, 11, 13, 16, 19, 23, 28, 33, 39, 45, 53, 61, 71, 81, 93,106,121,137,155,175,196,220,246, \
-                    60, 67, 74, 82, 91,100,110,121,133,146,159,174,190,207,224,244, \
-                     8,  9,  9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 20, 21, 23, 24, 26, 27, 29, 31, 33, 35, 37, 40, 42, 45, 47, 50, 53, 56, 59, 62, 66, 69, 73, 77, 81, 85, 90, 94, 99,104,109,114,120,126,132,138,144,151,158,165,173,180,188,196,205,214,223,232,242,252, \
-                    57, 60, 62, 65, 67, 70, 73, 76, 78, 82, 85, 88, 91, 95, 98,102,105,109,113,117,121,126,130,135,139,144,149,154,159,164,170,175,181,187,193,199,206,212,219,225,232,240,247,255
-// PWM Tops: VREF selector (0.55V=16,1.1V=17, 2.5V=18, 4.3V=19, 1.5V=20)
-#define PWM_TOPS    16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, \
-                    18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, \
-                    16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, \
-                    18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18
+#define PWM1_LEVELS \
+           2,  3,  4,  5,  7,  9, 11, 13, 16, 19, 23, 28, 33, 39, 45, 53, 61, 71, 81, 93,106,121,137,155,175,196,220,246, \
+          60, 67, 74, 82, 91,100,110,121,133,146,159,174,190,207,224,244, \
+          8,  9,  9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 20, 21, 23, 24, 26, 27, 29, 31, 33, 35, 37, 40, 42, 45, 47, 50, 53, 56, 59, 62, 66, 69, 73, 77, 81, 85, 90, 94, 99,104,109,114,120,126,132,138,144,151,158,165,173,180,188,196,205,214,223,232,242,252, \
+         57, 60, 62, 65, 67, 70, 73, 76, 78, 82, 85, 88, 91, 95, 98,102,105,109,113,117,121,126,130,135,139,144,149,154,159,164,170,175,181,187,193,199,206,212,219,225,232,240,247,255
+// PWM2: VREF selector (0.55V=16,1.1V=17, 2.5V=18, 4.3V=19, 1.5V=20)
+#define PWM2_LEVELS \
+        V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05, \
+        V25,V25,V25,V25,V25,V25,V25,V25,V25,V25,V25,V25,V25,V25,V25,V25, \
+        V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05,V05, \
+        V25,V25,V25,V25,V25,V25,V25,V25,V25,V25,V25,V25,V25,V25,V25,V25,V25,V25,V25,V25,V25,V25,V25,V25,V25,V25,V25,V25,V25,V25,V25,V25,V25,V25,V25,V25,V25,V25,V25,V25,V25,V25,V25,V25
 
 #define MAX_1x7135           44
 #define DEFAULT_LEVEL        44
@@ -71,7 +73,7 @@
 //#define SIMPLE_UI_ACTIVE 0 // advanced UI by default
 
 // allow Aux Config and Strobe Modes in Simple UI
-#define USE_EXTENDED_SIMPLE_UI
+//#define USE_EXTENDED_SIMPLE_UI
 
 // Allow 3C in Simple UI for switching between smooth and stepped ramping
 #define USE_SIMPLE_UI_RAMPING_TOGGLE
diff --git a/hw/thefreeman/boost21-mp3431-hdr-dac-argb/hwdef.c b/hw/thefreeman/boost21-mp3431-hdr-dac-argb/hwdef.c
index 97f5fc9..573ec2f 100644
--- a/hw/thefreeman/boost21-mp3431-hdr-dac-argb/hwdef.c
+++ b/hw/thefreeman/boost21-mp3431-hdr-dac-argb/hwdef.c
@@ -22,7 +22,7 @@ Channel channels[] = {
 
 void set_level_zero() {
     DAC_LVL  = 0;  // DAC off
-    DAC_VREF = V055;  // low Vref
+    mcu_set_dac_vref(V055);  // low Vref
     HDR_ENABLE_PORT &= ~(1 << HDR_ENABLE_PIN);  // HDR off
 
     // prevent post-off flash
@@ -49,8 +49,8 @@ void set_level_main(uint8_t level) {
     BST_ENABLE_PORT |= (1 << BST_ENABLE_PIN);
 
     // pre-load ramp data so it can be assigned faster later
-    PWM_DATATYPE dac_lvl  = PWM_GET(pwm1_levels, level);
-    PWM_DATATYPE dac_vref = PWM_GET(pwm_tops, level);
+    PWM1_DATATYPE dac_lvl  = PWM1_GET(level);
+    PWM2_DATATYPE dac_vref = PWM2_GET(level);
 
     // enable HDR on top half of ramp
     if (level >= (HDR_ENABLE_LEVEL_MIN-1))
@@ -61,7 +61,7 @@ void set_level_main(uint8_t level) {
     // set these in successive clock cycles to avoid getting out of sync
     // (minimizes ramp bumps when changing gears)
     DAC_LVL  = dac_lvl;
-    DAC_VREF = dac_vref;
+    mcu_set_dac_vref(dac_vref);
 
     if (noflash) {
         // wait for flash prevention to finish
@@ -75,11 +75,11 @@ bool gradual_tick_main(uint8_t gt) {
     // otherwise, simply jump to the next ramp level
     //   and let set_level() handle any gear changes
 
-    PWM_DATATYPE dac_next  = PWM_GET(pwm1_levels, gt);
-    PWM_DATATYPE vref_next = PWM_GET(pwm_tops, gt);
+    PWM1_DATATYPE dac_next  = PWM1_GET(gt);
+    PWM2_DATATYPE vref_next = PWM2_GET(gt);
 
     // different gear = full adjustment
-    if (vref_next != DAC_VREF) return true;  // let parent set_level() for us
+    if (vref_next != (DAC_VREF & VREF_DAC0REFSEL_gm)) return true;  // let parent set_level() for us
 
     // same gear = small adjustment
     GRADUAL_ADJUST_SIMPLE(dac_next, DAC_LVL);
diff --git a/hw/thefreeman/boost21-mp3431-hdr-dac-argb/hwdef.h b/hw/thefreeman/boost21-mp3431-hdr-dac-argb/hwdef.h
index 3f64287..d83aa46 100644
--- a/hw/thefreeman/boost21-mp3431-hdr-dac-argb/hwdef.h
+++ b/hw/thefreeman/boost21-mp3431-hdr-dac-argb/hwdef.h
@@ -37,9 +37,7 @@
  * IN- NFET : pull up after BST enable to eliminate startup flash, pull down otherwise
  */
 
-#include <avr/io.h>
-
-#define HWDEF_C_FILE thefreeman/boost21-mp3431-hdr-dac-argb/hwdef.c
+#define HWDEF_C  thefreeman/boost21-mp3431-hdr-dac-argb/hwdef.c
 
 // allow using aux LEDs as extra channel modes
 #include "fsm/chan-rgbaux.h"
@@ -59,24 +57,16 @@ enum CHANNEL_MODES {
 #define CHANNEL_MODES_ENABLED 0b0000000000000001
 
 
-#define PWM_CHANNELS  1  // old, remove this
-
 #define PWM_BITS      8         // 8-bit DAC
-#define PWM_GET       PWM_GET8
 #define PWM_DATATYPE  uint8_t
 #define PWM_DATATYPE2 uint16_t  // only needs 32-bit if ramp values go over 255
 #define PWM1_DATATYPE uint8_t   // main LED ramp
+#define PWM1_GET(l)   PWM_GET8(pwm1_levels, l)
+#define PWM2_DATATYPE uint8_t   // DAC Vref table
+#define PWM2_GET(l)   PWM_GET8(pwm2_levels, l)
 
 // main LED outputs
-#define DAC_LVL   DAC0.DATA    // 0 to 255, for 0V to Vref
-#define DAC_VREF  VREF.CTRLA   // 0.55V or 2.5V
-#define PWM_TOP_INIT  255      // highest value used in top half of ramp (unused?)
-// Vref values
-#define V055  16
-#define V11   17
-#define V25   18
-#define V43   19
-#define V15   20
+// (DAC_LVL + DAC_VREF + Vref values are defined in arch/*.h)
 
 // BST enable
 #define BST_ENABLE_PIN   PIN0_bp
@@ -100,8 +90,6 @@ enum CHANNEL_MODES {
 #define SWITCH_ISC_REG  PORTC.PIN2CTRL
 #define SWITCH_VECT     PORTC_PORT_vect
 #define SWITCH_INTFLG   VPORTC.INTFLAGS
-#define SWITCH_PCINT    PCINT0
-#define PCINT_vect      PCINT0_vect
 #endif
 
 // average drop across diode on this hardware
@@ -127,10 +115,9 @@ enum CHANNEL_MODES {
 
 inline void hwdef_setup() {
 
-    // TODO: for this DAC controlled-light, try to decrease the clock speed or use the ULP
-    // set up the system clock to run at 10 MHz to match other attiny1616 lights
-    _PROTECTED_WRITE( CLKCTRL.MCLKCTRLB,
-                      CLKCTRL_PDIV_2X_gc | CLKCTRL_PEN_bm );
+    // TODO: for this DAC controlled-light, try to decrease the clock speed
+    // to reduce overall system power
+    mcu_clock_speed();
 
     VPORTA.DIR = PIN6_bm;  // DAC
     VPORTB.DIR = PIN1_bm   // R
@@ -167,11 +154,10 @@ inline void hwdef_setup() {
     // set up the DAC
     // https://ww1.microchip.com/downloads/en/DeviceDoc/ATtiny1614-16-17-DataSheet-DS40002204A.pdf
     // DAC ranges from 0V to (255 * Vref) / 256
-    // also VREF_DAC0REFSEL_0V55_gc and VREF_DAC0REFSEL_1V1_gc and VREF_DAC0REFSEL_2V5_gc
-    VREF.CTRLA |= VREF_DAC0REFSEL_2V5_gc;
-    VREF.CTRLB |= VREF_DAC0REFEN_bm;
-    DAC0.CTRLA = DAC_ENABLE_bm | DAC_OUTEN_bm;
-    DAC0.DATA = 255; // set the output voltage
+    mcu_set_dac_vref(V05);  // boot at lowest Vref setting
+    VREF.CTRLB |= VREF_DAC0REFEN_bm;  // enable DAC Vref
+    DAC0.CTRLA = DAC_ENABLE_bm | DAC_OUTEN_bm;  // enable DAC
+    DAC_LVL = 0;  // turn off output at boot
 
 }