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| author | Selene ToyKeeper | 2018-11-03 18:55:31 -0600 |
|---|---|---|
| committer | Selene ToyKeeper | 2018-11-03 18:55:31 -0600 |
| commit | 94ba77de5c2c4bf8df3f23ac9ab397a360a75e69 (patch) | |
| tree | 87cd0f266772a88019c7eedb285278579edcb49c /hwdef-BLF_GT.h | |
| parent | forgot to add the Sofirn SP36 config file earlier, oops (diff) | |
| download | anduril-94ba77de5c2c4bf8df3f23ac9ab397a360a75e69.tar.gz anduril-94ba77de5c2c4bf8df3f23ac9ab397a360a75e69.tar.bz2 anduril-94ba77de5c2c4bf8df3f23ac9ab397a360a75e69.zip | |
Made it easier to override hwdef-*.h values in cfg-*.h files.
Diffstat (limited to 'hwdef-BLF_GT.h')
| -rw-r--r-- | hwdef-BLF_GT.h | 16 |
1 files changed, 15 insertions, 1 deletions
diff --git a/hwdef-BLF_GT.h b/hwdef-BLF_GT.h index 1a05741..7dcc8a0 100644 --- a/hwdef-BLF_GT.h +++ b/hwdef-BLF_GT.h @@ -9,29 +9,43 @@ #define PWM_CHANNELS 2 +#ifndef AUXLED_PIN #define AUXLED_PIN PB4 // pin 3 +#endif +#ifndef SWITCH_PIN #define SWITCH_PIN PB3 // pin 2 #define SWITCH_PCINT PCINT3 // pin 2 pin change interrupt +#endif +#ifndef PWM1_PIN #define PWM1_PIN PB0 // pin 5, 1x7135 PWM #define PWM1_LVL OCR0A // OCR0A is the output compare register for PB0 +#endif +#ifndef PWM2_PIN #define PWM2_PIN PB1 // pin 6, FET PWM #define PWM2_LVL OCR0B // OCR0B is the output compare register for PB1 +#endif #define USE_VOLTAGE_DIVIDER // use a voltage divider on pin 7, not VCC +#ifndef VOLTAGE_PIN #define VOLTAGE_PIN PB2 // pin 7, voltage ADC #define VOLTAGE_CHANNEL 0x01 // MUX 01 corresponds with PB2 +#define VOLTAGE_ADC_DIDR ADC1D // Digital input disable bit corresponding with PB2 // 1.1V reference, left-adjust, ADC1/PB2 //#define ADMUX_VOLTAGE_DIVIDER ((1 << V_REF) | (1 << ADLAR) | VOLTAGE_CHANNEL) // 1.1V reference, no left-adjust, ADC1/PB2 #define ADMUX_VOLTAGE_DIVIDER ((1 << V_REF) | VOLTAGE_CHANNEL) -#define VOLTAGE_ADC_DIDR ADC1D // Digital input disable bit corresponding with PB2 +#endif #define ADC_PRSCL 0x06 // clk/64 // Raw ADC readings at 4.4V and 2.2V (in-between, we assume values form a straight line) +#ifndef ADC_44 #define ADC_44 184 +#endif +#ifndef ADC_22 #define ADC_22 92 +#endif #define TEMP_CHANNEL 0b00001111 |