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| author | Selene ToyKeeper | 2021-09-08 21:40:27 -0600 |
|---|---|---|
| committer | Selene ToyKeeper | 2021-09-08 21:40:27 -0600 |
| commit | 7489f72a8eedf89be0052ebf72e9a1e41aa5ed78 (patch) | |
| tree | 100c43d23cc39406975183c1882f3f15531eb1c4 /hwdef-BLF_LT1.h | |
| parent | fixed D4Sv2-tintramp PWM_TOP (should be set to the value it needs during ther... (diff) | |
| download | anduril-7489f72a8eedf89be0052ebf72e9a1e41aa5ed78.tar.gz anduril-7489f72a8eedf89be0052ebf72e9a1e41aa5ed78.tar.bz2 anduril-7489f72a8eedf89be0052ebf72e9a1e41aa5ed78.zip | |
got BLF LT1 working again, using new tint-ramping code
Diffstat (limited to 'hwdef-BLF_LT1.h')
| -rw-r--r-- | hwdef-BLF_LT1.h | 54 |
1 files changed, 44 insertions, 10 deletions
diff --git a/hwdef-BLF_LT1.h b/hwdef-BLF_LT1.h index 5dac5d2..d0c2821 100644 --- a/hwdef-BLF_LT1.h +++ b/hwdef-BLF_LT1.h @@ -1,21 +1,55 @@ -#ifndef HWDEF_BLF_Q8_H -#define HWDEF_BLF_Q8_H +#ifndef HWDEF_BLF_LT1_H +#define HWDEF_BLF_LT1_H -/* BLF Q8 driver layout - * Q8 driver is the same as a D4, basically +/* BLF LT1 driver layout + * ---- + * Reset -|1 8|- VCC + * eswitch -|2 7|- (unused) + * aux LED -|3 6|- PWM (5000K) + * GND -|4 5|- PWM (3000K) + * ---- */ -// ... except the Q8 has a lighted button -#ifndef AUXLED_PIN +#define ATTINY 85 +#include <avr/io.h> + +#define PWM_CHANNELS 1 // 1 virtual channel (1 for main LEDs + 1 for 2nd LEDs) +#define PWM_BITS 8 // 0 to 255 at 15.6 kHz +#define PWM_TOP 255 + +// dynamic PWM with tint ramping (not supported on attiny85) +//#define USE_DYN_PWM // dynamic frequency and speed +//#define PWM1_CNT TCNT0 // for dynamic PWM, reset phase + +// usually PWM1_LVL would be a hardware register, but we need to abstract +// it out to a soft brightness value, in order to handle tint ramping +// (this allows smooth thermal regulation to work, and makes things +// otherwise simpler and easier) +uint8_t PWM1_LVL; + +#define PWM1_PIN PB0 // pin 5, warm tint PWM +#define TINT1_LVL OCR0A // OCR0A is the output compare register for PB0 + +#define PWM2_PIN PB1 // pin 6, cold tint PWM +#define TINT2_LVL OCR0B // OCR0B is the output compare register for PB1 + + #define AUXLED_PIN PB4 // pin 3 -#endif -// ... and slightly different calibration +#define SWITCH_PIN PB3 // pin 2 +#define SWITCH_PCINT PCINT3 // pin 2 pin change interrupt + +#define ADC_PRSCL 0x07 // clk/128 + +// average drop across diode on this hardware #ifndef VOLTAGE_FUDGE_FACTOR #define VOLTAGE_FUDGE_FACTOR 7 // add 0.35V #endif -// Q8 driver is the same as a D4, basically -#include "hwdef-Emisar_D4.h" +#define FAST 0xA3 // fast PWM both channels +#define PHASE 0xA1 // phase-correct PWM both channels + +#define LAYOUT_DEFINED + #endif |
