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| author | Selene ToyKeeper | 2019-05-18 03:33:40 -0600 |
|---|---|---|
| committer | Selene ToyKeeper | 2019-05-18 03:33:40 -0600 |
| commit | 51d53d2b30dbd3c4c585834ad81de20745740f8e (patch) | |
| tree | 6e366b5cfe97f04181bc468aa06d710b7807be1d /hwdef-Emisar_D18.h | |
| parent | added link to HQ ProgKey, since it's increasingly important for newer drivers (diff) | |
| parent | merged in BLF Lantern branch, even though it's not quite finished, because it... (diff) | |
| download | anduril-51d53d2b30dbd3c4c585834ad81de20745740f8e.tar.gz anduril-51d53d2b30dbd3c4c585834ad81de20745740f8e.tar.bz2 anduril-51d53d2b30dbd3c4c585834ad81de20745740f8e.zip | |
merged updates from fsm branch, because it has been way too long since the last time
Diffstat (limited to 'hwdef-Emisar_D18.h')
| -rw-r--r-- | hwdef-Emisar_D18.h | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/hwdef-Emisar_D18.h b/hwdef-Emisar_D18.h new file mode 100644 index 0000000..638dadb --- /dev/null +++ b/hwdef-Emisar_D18.h @@ -0,0 +1,51 @@ +#ifndef HWDEF_EMISAR_D18_H +#define HWDEF_EMISAR_D18_H + +/* Emisar D18 (FET+13+1) driver layout + * ---- + * Reset -|1 8|- VCC + * eswitch -|2 7|- aux LED? + * FET -|3 6|- 13x7135 + * GND -|4 5|- 1x7135 + * ---- + */ + +#define PWM_CHANNELS 3 + +#ifndef SWITCH_PIN +#define SWITCH_PIN PB3 // pin 2 +#define SWITCH_PCINT PCINT3 // pin 2 pin change interrupt +#endif + +#ifndef PWM1_PIN +#define PWM1_PIN PB0 // pin 5, 1x7135 PWM +#define PWM1_LVL OCR0A // OCR0A is the output compare register for PB0 +#endif +#ifndef PWM2_PIN +#define PWM2_PIN PB1 // pin 6, 7x7135 PWM +#define PWM2_LVL OCR0B // OCR0B is the output compare register for PB1 +#endif +#ifndef PWM3_PIN +#define PWM3_PIN PB4 // pin 3, FET PWM +#define PWM3_LVL OCR1B // OCR1B is the output compare register for PB4 +#endif + +#ifndef AUXLED_PIN +#define AUXLED_PIN PB2 // pin 7 +#endif +#define ADC_PRSCL 0x06 // clk/64 + +// average drop across diode on this hardware +#ifndef VOLTAGE_FUDGE_FACTOR +#define VOLTAGE_FUDGE_FACTOR 5 // add 0.25V +#endif + +//#define TEMP_DIDR ADC4D +#define TEMP_CHANNEL 0b00001111 + +#define FAST 0xA3 // fast PWM both channels +#define PHASE 0xA1 // phase-correct PWM both channels + +#define LAYOUT_DEFINED + +#endif |
