adjusted hwdef settings for tint-ramping D4Sv2

(initial rev, will almost certainly need changes later)

1 files changed, 25 insertions, 17 deletions

diff --git a/hwdef-Emisar_D4Sv2-tintramp.h b/hwdef-Emisar_D4Sv2-tintramp.h
index 6032b4c..1b24238 100644
--- a/hwdef-Emisar_D4Sv2-tintramp.h
+++ b/hwdef-Emisar_D4Sv2-tintramp.h
@@ -1,7 +1,8 @@
-#ifndef HWDEF_NOCTIGON_K93_H
-#define HWDEF_NOCTIGON_K93_H
+#ifndef HWDEF_D4SV2_TINTRAMP_H
+#define HWDEF_D4SV2_TINTRAMP_H
 
-/* Noctigon K9.3 driver layout (attiny1634)
+/* Emisar D4Sv2 w/ tint ramping
+ * (based on the Noctigon K9.3 driver layout (attiny1634))
  *
  * Pin / Name / Function
  *   1    PA6   2nd LED PWM (linear) (PWM1B)
@@ -18,7 +19,7 @@
  *  12    PC3   RESET
  *  13    PC2   (none)
  *  14    PC1   SCK
- *  15    PC0   main LED PWM (FET) (PWM0A)
+ *  15    PC0   main LED PWM (FET) (PWM0A) (unused because tint ramping)
  *  16    PB3   main LED PWM (linear) (PWM1A)
  *  17    PB2   MISO
  *  18    PB1   MOSI / battery voltage (ADC6)
@@ -31,7 +32,6 @@
  * Main brightness control uses the power level pin, with 4 kHz 10-bit PWM.
  * The on/off pin is only used to turn the main LED on and off,
  * not to change brightness.
- * Some models also have a direct-drive FET for turbo.
  */
 
 #ifdef ATTINY
@@ -40,9 +40,11 @@
 #define ATTINY 1634
 #include <avr/io.h>
 
-#define PWM_CHANNELS 3  // 2 for main LEDs, 1 for 2nd LEDs
-#define PWM_BITS 10  // 0 to 1023 at 4 kHz, not 0 to 255 at 16 kHz
-#define PWM_TOP 1023
+#define PWM_CHANNELS 2  // 1 for main LEDs, 1 for 2nd LEDs
+#define PWM_BITS 12  // 0 to 4095 at 1 kHz, not 0 to 255 at 16 kHz
+#define PWM_TOP 4095
+// TODO: dynamic PWM with tint ramping
+//#define USE_DYN_PWM  // dynamic frequency and speed
 
 #define SWITCH_PIN   PA7     // pin 20
 #define SWITCH_PCINT PCINT7  // pin 20 pin change interrupt
@@ -53,12 +55,16 @@
 
 #define PWM1_PIN PB3        // pin 16, Opamp reference
 #define PWM1_LVL OCR1A      // OCR1A is the output compare register for PB3
+#define PWM1_CNT TCNT1      // for dynamic PWM, reset phase
 
-#define PWM2_PIN PC0        // pin 15, DD FET PWM
-#define PWM2_LVL OCR0A      // OCR0A is the output compare register for PC0
+#define PWM2_PIN PA6        // pin 1, 2nd LED Opamp reference
+#define PWM2_LVL OCR1B      // OCR1B is the output compare register for PA6
 
-#define PWM3_PIN PA6        // pin 1, 2nd LED Opamp reference
-#define PWM3_LVL OCR1B      // OCR1B is the output compare register for PA6
+#define PWM3_PIN PC0        // pin 15, DD FET PWM
+#define PWM3_LVL OCR0A      // OCR0A is the output compare register for PC0
+
+// PWM parameters of both channels are tied together because they share a counter
+#define PWM1_TOP ICR1       // holds the TOP value for for variable-resolution PWM
 
 #define LED_ENABLE_PIN  PA0    // pin 7, Opamp power
 #define LED_ENABLE_PORT PORTA  // control port for PA0
@@ -114,9 +120,9 @@
 // ... so just hardcode it in each hwdef file instead
 inline void hwdef_setup() {
   // enable output ports
-  DDRC = (1 << PWM2_PIN);
+  DDRC = (1 << PWM3_PIN);
   DDRB = (1 << PWM1_PIN);
-  DDRA = (1 << PWM3_PIN)
+  DDRA = (1 << PWM2_PIN)
        | (1 << AUXLED_R_PIN)
        | (1 << AUXLED_G_PIN)
        | (1 << AUXLED_B_PIN)
@@ -129,16 +135,16 @@ inline void hwdef_setup() {
   // Setup PWM. F_pwm = F_clkio / 2 / N / TOP, where N = prescale factor, TOP = top of counter
   // pre-scale for timer: N = 1
   // Linear opamp PWM for both main and 2nd LEDs (10-bit)
-  // WGM1[3:0]: 0,0,1,1: PWM, Phase Correct, 10-bit (DS table 12-5)
+  // WGM1[3:0]: 1,0,1,0: PWM, Phase Correct, adjustable (DS table 12-5)
   // CS1[2:0]:    0,0,1: clk/1 (No prescaling) (DS table 12-6)
   // COM1A[1:0]:    1,0: PWM OC1A in the normal direction (DS table 12-4)
   // COM1B[1:0]:    1,0: PWM OC1B in the normal direction (DS table 12-4)
-  TCCR1A  = (1<<WGM11)  | (1<<WGM10)   // 10-bit (TOP=0x03FF) (DS table 12-5)
+  TCCR1A  = (1<<WGM11)  | (0<<WGM10)   // adjustable PWM (TOP=ICR1) (DS table 12-5)
           | (1<<COM1A1) | (0<<COM1A0)  // PWM 1A in normal direction (DS table 12-4)
           | (1<<COM1B1) | (0<<COM1B0)  // PWM 1B in normal direction (DS table 12-4)
           ;
   TCCR1B  = (0<<CS12)   | (0<<CS11) | (1<<CS10)  // clk/1 (no prescaling) (DS table 12-6)
-          | (0<<WGM13)  | (0<<WGM12)  // phase-correct PWM (DS table 12-5)
+          | (1<<WGM13)  | (0<<WGM12)  // phase-correct adjustable PWM (DS table 12-5)
           ;
 
   // FET PWM (8-bit; this channel can't do 10-bit)
@@ -153,6 +159,8 @@ inline void hwdef_setup() {
   TCCR0B  = (0<<CS02)   | (0<<CS01) | (1<<CS00)  // clk/1 (no prescaling) (DS table 11-9)
           | (0<<WGM02)  // phase-correct PWM (DS table 11-8)
           ;
+  // set PWM resolution
+  PWM1_TOP = PWM_TOP;
 
   // set up e-switch
   PUEA = (1 << SWITCH_PIN);  // pull-up for e-switch