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authorSelene ToyKeeper2018-11-08 17:45:09 -0700
committerSelene ToyKeeper2018-11-08 17:45:09 -0700
commite143d03198ff1d16cc91ed94d5ea529170e9bfbf (patch)
tree0f5ebc8816bea516722dfec7ea832994e4b3c9bf /hwdef-FW3A.h
parentadded lantern pin layout (diff)
parentMade it easier to override hwdef-*.h values in cfg-*.h files. (diff)
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merged upstream changes from fsm branch
Diffstat (limited to 'hwdef-FW3A.h')
-rw-r--r--hwdef-FW3A.h22
1 files changed, 17 insertions, 5 deletions
diff --git a/hwdef-FW3A.h b/hwdef-FW3A.h
index 5e253c7..8abab9a 100644
--- a/hwdef-FW3A.h
+++ b/hwdef-FW3A.h
@@ -9,23 +9,35 @@
#define PWM_CHANNELS 3
+#ifndef SWITCH_PIN
#define SWITCH_PIN PB3 // pin 2
#define SWITCH_PCINT PCINT3 // pin 2 pin change interrupt
+#endif
+#ifndef PWM1_PIN
#define PWM1_PIN PB0 // pin 5, 1x7135 PWM
#define PWM1_LVL OCR0A // OCR0A is the output compare register for PB0
-#define PWM2_PIN PB1 // pin 6, FET PWM
+#endif
+#ifndef PWM2_PIN
+#define PWM2_PIN PB1 // pin 6, 7x7135 PWM
#define PWM2_LVL OCR0B // OCR0B is the output compare register for PB1
-#define PWM3_PIN PB4 // pin 3
-#define PWM3_LVL OCR1B
+#endif
+#ifndef PWM3_PIN
+#define PWM3_PIN PB4 // pin 3, FET PWM
+#define PWM3_LVL OCR1B // OCR1B is the output compare register for PB4
+#endif
+#ifndef VISION_PIN
#define VISION_PIN PB2 // pin 7, optic nerve
-#define ADC_CHANNEL 0x01 // MUX 01 corresponds with PB2
-#define ADC_DIDR ADC1D // Digital input disable bit corresponding with PB2
+//#define ADC_CHANNEL 0x01 // MUX 01 corresponds with PB2
+//#define ADC_DIDR ADC1D // Digital input disable bit corresponding with PB2
+#endif
#define ADC_PRSCL 0x06 // clk/64
// average drop across diode on this hardware
+#ifndef VOLTAGE_FUDGE_FACTOR
#define VOLTAGE_FUDGE_FACTOR 5 // add 0.25V
+#endif
//#define TEMP_DIDR ADC4D
#define TEMP_CHANNEL 0b00001111