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| author | Selene ToyKeeper | 2022-04-14 21:39:50 -0600 |
|---|---|---|
| committer | Selene ToyKeeper | 2022-04-14 21:39:50 -0600 |
| commit | b34e7a1f3b9ab1b69d863187d542449545c21201 (patch) | |
| tree | 68bf7a1e7813480311a8dc0009cfb4cbeca7e888 /hwdef-Noctigon_DM11-SBT90.h | |
| parent | just a couple quick notes on using attiny1616, since the process is still evo... (diff) | |
| parent | applied new phase-hack flags to other builds where relevant (diff) | |
| download | anduril-b34e7a1f3b9ab1b69d863187d542449545c21201.tar.gz anduril-b34e7a1f3b9ab1b69d863187d542449545c21201.tar.bz2 anduril-b34e7a1f3b9ab1b69d863187d542449545c21201.zip | |
merged sp10-pro shutoff fix and mt35-mini support
Diffstat (limited to 'hwdef-Noctigon_DM11-SBT90.h')
| -rw-r--r-- | hwdef-Noctigon_DM11-SBT90.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/hwdef-Noctigon_DM11-SBT90.h b/hwdef-Noctigon_DM11-SBT90.h index 64ebe05..8d7aa3d 100644 --- a/hwdef-Noctigon_DM11-SBT90.h +++ b/hwdef-Noctigon_DM11-SBT90.h @@ -56,6 +56,9 @@ #define PWM1_PIN PB3 // pin 16, Opamp reference #define PWM1_LVL OCR1A // OCR1A is the output compare register for PB3 #define PWM1_CNT TCNT1 // for dynamic PWM, reset phase +#define PWM1_PHASE_RESET_OFF // force reset while shutting off +#define PWM1_PHASE_RESET_ON // force reset while turning on +#define PWM1_PHASE_SYNC // manual sync while changing level #define PWM2_PIN PA6 // pin 1, DD FET PWM #define PWM2_LVL OCR1B // OCR1B is the output compare register for PA6 |