aboutsummaryrefslogtreecommitdiff
path: root/hwdef-blf-lt1.c
diff options
context:
space:
mode:
authorSelene ToyKeeper2023-10-29 13:19:38 -0600
committerSelene ToyKeeper2023-10-29 13:19:38 -0600
commit4aec487ea7d03e9554ebbe8f50e72235bf6f2e6e (patch)
tree97dc4d4f8e52ee560ed65ba98c33e08ff3f4f2fa /hwdef-blf-lt1.c
parentconverted noctigon-dm11-boost to use PWM+DSM, and recalibrated timing for del... (diff)
downloadanduril-4aec487ea7d03e9554ebbe8f50e72235bf6f2e6e.tar.gz
anduril-4aec487ea7d03e9554ebbe8f50e72235bf6f2e6e.tar.bz2
anduril-4aec487ea7d03e9554ebbe8f50e72235bf6f2e6e.zip
applied new delay factor to other DSM builds, and some new DSM_* defines
Diffstat (limited to 'hwdef-blf-lt1.c')
-rw-r--r--hwdef-blf-lt1.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/hwdef-blf-lt1.c b/hwdef-blf-lt1.c
index 8a8af52..8a4c0e1 100644
--- a/hwdef-blf-lt1.c
+++ b/hwdef-blf-lt1.c
@@ -52,7 +52,7 @@ Channel channels[] = {
void set_level_zero() {
// disable timer 0 overflow interrupt
// (helps improve button press handling from Off state)
- TIMSK &= ~(1 << TOIE0);
+ DSM_INTCTRL &= ~DSM_OVF_bm;
// turn off all LEDs
ch1_dsm_lvl = 0;
@@ -72,14 +72,14 @@ void set_hw_levels(PWM_DATATYPE ch1, PWM_DATATYPE ch2) {
CH1_PWM = ch1_pwm = ch1 >> 7;
CH2_PWM = ch2_pwm = ch2 >> 7;
- // enable timer 0 overflow interrupt so DSM can work
- TIMSK |= (1 << TOIE0);
+ // enable timer overflow interrupt so DSM can work
+ DSM_INTCTRL |= DSM_OVF_bm;
}
// delta-sigma modulation of PWM outputs
-// happens on each Timer0 overflow (every 512 cpu clock cycles)
+// happens on each Timer overflow (every 512 cpu clock cycles)
// uses 8-bit pwm w/ 7-bit dsm (0b 0PPP PPPP PDDD DDDD)
-ISR(TIMER0_OVF_vect) {
+ISR(DSM_vect) {
// set new hardware values first,
// for best timing (reduce effect of interrupt jitter)
CH1_PWM = ch1_pwm;