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authorSelene ToyKeeper2020-04-26 22:03:22 -0600
committerSelene ToyKeeper2020-04-26 22:03:22 -0600
commitd4cdfd20e21a332aa6d191955998ee460f243c0d (patch)
treed79dc759421112eefc05401828efa21c7de11176 /spaghetti-monster/fsm-misc.c
parentfixed eeprom corruption after turning boost chip on/off (diff)
parentadded tweakable thermal_response_magnitude option, adjusted KR4 thermal vars,... (diff)
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merged Noctigon KR4 branch, including recent ADC+thermal rewrite
Diffstat (limited to 'spaghetti-monster/fsm-misc.c')
-rw-r--r--spaghetti-monster/fsm-misc.c46
1 files changed, 35 insertions, 11 deletions
diff --git a/spaghetti-monster/fsm-misc.c b/spaghetti-monster/fsm-misc.c
index 8da7b5b..82be745 100644
--- a/spaghetti-monster/fsm-misc.c
+++ b/spaghetti-monster/fsm-misc.c
@@ -46,19 +46,41 @@ uint8_t blink_digit(uint8_t num) {
//StatePtr old_state = current_state;
// "zero" digit gets a single short blink
- uint8_t ontime = BLINK_SPEED * 2 / 10;
+ uint8_t ontime = BLINK_SPEED * 2 / 12;
if (!num) { ontime = 8; num ++; }
for (; num>0; num--) {
set_level(BLINK_BRIGHTNESS);
nice_delay_ms(ontime);
set_level(0);
- nice_delay_ms(BLINK_SPEED * 3 / 10);
+ nice_delay_ms(BLINK_SPEED * 3 / 12);
}
- return nice_delay_ms(BLINK_SPEED * 5 / 10);
+ return nice_delay_ms(BLINK_SPEED * 8 / 12);
}
#endif
+#ifdef USE_BLINK_BIG_NUM
+uint8_t blink_big_num(uint16_t num) {
+ uint16_t digits[] = { 10000, 1000, 100, 10, 1 };
+ uint8_t started = 0;
+ for (uint8_t digit=0; digit<sizeof(digits)/sizeof(uint16_t); digit++) {
+ uint16_t scale = digits[digit];
+ if (num >= scale) {
+ started = 1;
+ }
+ if (started) {
+ uint8_t digit = 0;
+ while (num >= scale) {
+ num -= scale;
+ digit ++;
+ }
+ if (! blink_digit(digit)) return 0;
+ }
+ }
+
+ return nice_delay_ms(1000);
+}
+#endif
#ifdef USE_BLINK_NUM
uint8_t blink_num(uint8_t num) {
//StatePtr old_state = current_state;
@@ -209,18 +231,20 @@ uint8_t triangle_wave(uint8_t phase) {
#ifdef USE_REBOOT
void reboot() {
- #if 1 // WDT method, safer but larger
+ // put the WDT in hard reset mode, then trigger it
cli();
- WDTCR = 0xD8 | WDTO_15MS;
+ #if (ATTINY == 25) || (ATTINY == 45) || (ATTINY == 85)
+ WDTCR = 0xD8 | WDTO_15MS;
+ #elif (ATTINY == 1634)
+ // allow protected configuration changes for next 4 clock cycles
+ CCP = 0xD8; // magic number
+ // reset (WDIF + WDE), no WDIE, fastest (16ms) timing (0000)
+ // (DS section 8.5.2 and table 8-4)
+ WDTCSR = 0b10001000;
+ #endif
sei();
wdt_reset();
while (1) {}
- #else // raw assembly method, doesn't reset registers or anything
- __asm__ __volatile__ (
- "cli" "\n\t"
- "rjmp 0x00" "\n\t"
- );
- #endif
}
#endif