diff options
Diffstat (limited to 'hw/hank/emisar-2ch/fet')
| -rw-r--r-- | hw/hank/emisar-2ch/fet/anduril.h | 113 | ||||
| -rw-r--r-- | hw/hank/emisar-2ch/fet/hwdef.c | 206 | ||||
| -rw-r--r-- | hw/hank/emisar-2ch/fet/hwdef.h | 209 |
3 files changed, 528 insertions, 0 deletions
diff --git a/hw/hank/emisar-2ch/fet/anduril.h b/hw/hank/emisar-2ch/fet/anduril.h new file mode 100644 index 0000000..3a9e513 --- /dev/null +++ b/hw/hank/emisar-2ch/fet/anduril.h @@ -0,0 +1,113 @@ +// Emisar 2-channel generic (plus FET) config options for Anduril (based on Noctigon K9.3) +// Copyright (C) 2021-2023 Selene ToyKeeper +// SPDX-License-Identifier: GPL-3.0-or-later +#pragma once + +#define MODEL_NUMBER "0136" +#include "hank/emisar-2ch/fet/hwdef.h" +#include "hank/anduril.h" +// ATTINY: 1634 + +// this light has three aux LED channels: R, G, B +#define USE_AUX_RGB_LEDS +// the aux LEDs are front-facing, so turn them off while main LEDs are on +// it also has an independent LED in the button +#define USE_BUTTON_LED +// TODO: the whole "indicator LED" thing needs to be refactored into +// "aux LED(s)" and "button LED(s)" since they work a bit differently +// enabling this option breaks the button LED on D4v2.5 +#ifdef USE_INDICATOR_LED_WHILE_RAMPING +#undef USE_INDICATOR_LED_WHILE_RAMPING +#endif + +// channel modes... +// CM_CH1, CM_CH2, CM_BOTH, CM_BLEND, CM_AUTO +// enable max brightness out of the box +#define DEFAULT_CHANNEL_MODE CM_BOTH + +#define USE_CONFIG_COLORS + +// blink numbers on the main LEDs by default (but allow user to change it) +#define DEFAULT_BLINK_CHANNEL CM_BOTH + +#define POLICE_COLOR_STROBE_CH1 CM_CH1 +#define POLICE_COLOR_STROBE_CH2 CM_CH2 + +// how much to increase total brightness at middle tint +// (0 = 100% brightness, 64 = 200% brightness) +#define TINT_RAMPING_CORRECTION 0 // none, linear regulator doesn't need it + + +// channel 1 / main LEDs (w/ DD FET) +// output: unknown, 1750 lm? +// FET: unknown, 3000 lm? +// channel 2 +// output: unknown, 1750 lm? +// combined: 4000 to 5000 lm? +#define RAMP_SIZE 150 + +// linear+FET ramp: maxreg at 140/150 +// level_calc.py 5.01 2 150 7135 1 0.1 1924 FET 1 10 2600 --pwm dyn:68:4096:255:3 --clock 8:16:0 +// linear segment +#define PWM1_LEVELS 1,1,1,1,1,1,1,1,1,1,1,1,1,2,2,2,2,2,2,2,2,3,3,3,3,3,3,3,4,4,4,4,4,4,4,4,5,5,5,5,5,5,5,5,5,6,6,6,6,6,6,7,7,7,7,8,8,8,9,9,9,10,10,11,12,13,13,14,15,16,17,17,18,19,20,21,22,23,25,26,27,28,30,31,33,34,36,37,39,41,43,44,46,48,50,53,55,57,60,62,65,67,70,73,76,79,82,85,88,92,95,99,103,106,110,114,119,123,127,132,137,142,147,152,157,162,168,174,179,185,192,198,204,211,218,225,232,240,247,255,255,255,255,255,255,255,255,255,255,255 +// DD FET segment +#define PWM2_LEVELS 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,20,44,68,93,118,144,171,198,226,255 +// PWM TOPS values +#define PWM3_LEVELS 4096,3831,3570,3314,3063,2817,2577,2342,2115,1894,1682,1477,1281,2237,2005,1784,1576,1380,1196,1111,1026,1442,1348,1215,1091,976,871,774,1031,942,860,784,714,650,591,538,652,602,555,513,473,437,403,372,343,398,370,345,322,299,278,311,292,273,255,278,261,245,263,247,232,246,231,243,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255 + +// linear-only ramp +// level_calc.py 3.11 1 150 7135 1 0.1 1750 --pwm dyn:64:4096:255:3 --clock 8:16:0 +#define PWM4_LEVELS 1,1,1,1,1,1,2,2,2,3,3,3,4,4,4,5,5,6,6,6,7,7,7,8,8,8,9,9,9,10,10,10,10,10,10,11,11,11,11,11,11,11,12,12,12,12,12,12,13,13,13,14,14,14,15,15,16,17,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,33,34,35,37,38,39,41,42,44,45,47,48,50,52,53,55,57,59,61,63,65,67,69,71,73,75,77,79,82,84,86,89,91,94,97,99,102,105,107,110,113,116,119,122,125,128,132,135,138,141,145,148,152,156,159,163,167,170,174,178,182,186,190,195,199,203,208,212,217,221,226,230,235,240,245,250,255 +// PWM_TOPS values for linear-only ramp +#define PWM5_LEVELS 4096,3681,3247,2794,2328,1856,2937,2393,1860,2690,2273,1875,2281,1959,1658,1893,1646,1774,1569,1381,1466,1309,1166,1224,1104,996,1033,942,858,882,810,746,687,634,586,604,561,522,487,454,425,397,409,385,362,341,321,302,311,295,279,286,271,257,263,250,255,258,246,249,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255 + +#define DEFAULT_LEVEL 75 +#define MAX_1x7135 140 +#define MAX_Nx7135 MAX_1x7135 +#define HALFSPEED_LEVEL 16 +#define QUARTERSPEED_LEVEL 8 + +#define RAMP_SMOOTH_FLOOR 10 // level 1 is unreliable (?) +#define RAMP_SMOOTH_CEIL 140 +// 10, 31, 53, [75], 96, 118, [140] +#define RAMP_DISCRETE_FLOOR 10 +#define RAMP_DISCRETE_CEIL RAMP_SMOOTH_CEIL +#define RAMP_DISCRETE_STEPS 7 + +// safe limit highest regulated power (no FET or turbo) +// 10, 42, [75], 107, 140 +#define SIMPLE_UI_FLOOR RAMP_DISCRETE_FLOOR +#define SIMPLE_UI_CEIL RAMP_DISCRETE_CEIL +#define SIMPLE_UI_STEPS 5 + +// stop panicking at ~1500 lm +#define THERM_FASTER_LEVEL 130 +#define MIN_THERM_STEPDOWN 65 // should be above highest dyn_pwm level + +#define USE_POLICE_COLOR_STROBE_MODE +#undef TACTICAL_LEVELS +#define TACTICAL_LEVELS 140,30,(RAMP_SIZE+3) // high, low, police strobe + +// use the brightest setting for strobe +#define STROBE_BRIGHTNESS MAX_LEVEL +// slow down party strobe; this driver can't pulse for 1ms or less +#define PARTY_STROBE_ONTIME 2 +// TODO: change speed per channel mode +// (the FET is really fast, but the regulator is not) +//#undef PARTY_STROBE_ONTIME + +// the default of 26 looks a bit flat, so increase it +#define CANDLE_AMPLITUDE 33 + +// the power regulator is a bit slow, so push it harder for a quick response from off +#define DEFAULT_JUMP_START_LEVEL 40 +#define BLINK_BRIGHTNESS 45 +#define BLINK_ONCE_TIME 12 // longer blink, since main LEDs are slow + +#define THERM_CAL_OFFSET 5 + +// don't blink while ramping +#ifdef BLINK_AT_RAMP_MIDDLE +#undef BLINK_AT_RAMP_MIDDLE +#endif + diff --git a/hw/hank/emisar-2ch/fet/hwdef.c b/hw/hank/emisar-2ch/fet/hwdef.c new file mode 100644 index 0000000..4309a42 --- /dev/null +++ b/hw/hank/emisar-2ch/fet/hwdef.c @@ -0,0 +1,206 @@ +// Emisar generic 2-channel + DD FET w/ tint ramping +// Copyright (C) 2021-2023 Selene ToyKeeper +// SPDX-License-Identifier: GPL-3.0-or-later + +#pragma once + +#include "fsm/chan-rgbaux.c" + + +void set_level_zero(); + +void set_level_ch1(uint8_t level); +void set_level_ch2(uint8_t level); +void set_level_both(uint8_t level); +void set_level_blend(uint8_t level); +void set_level_auto(uint8_t level); + +bool gradual_tick_ch1(uint8_t gt); +bool gradual_tick_ch2(uint8_t gt); +bool gradual_tick_both(uint8_t gt); +bool gradual_tick_blend(uint8_t gt); +bool gradual_tick_auto(uint8_t gt); + + +Channel channels[] = { + { // channel 1 only + .set_level = set_level_ch1, + .gradual_tick = gradual_tick_ch1, + .has_args = 0 + }, + { // channel 2 only + .set_level = set_level_ch2, + .gradual_tick = gradual_tick_ch2, + .has_args = 0 + }, + { // both channels, tied together (max "200%" power) + .set_level = set_level_both, + .gradual_tick = gradual_tick_both, + .has_args = 0 + }, + { // both channels, manual blend (max "100%" power) + .set_level = set_level_blend, + .gradual_tick = gradual_tick_blend, + .has_args = 1 + }, + { // both channels, auto blend + .set_level = set_level_auto, + .gradual_tick = gradual_tick_auto, + .has_args = 1 + }, + RGB_AUX_CHANNELS +}; + + +// set new values for both channels, +// handling any possible combination +// and any before/after state +void set_pwms(uint8_t ch1_pwm, uint8_t ch2_pwm, uint8_t ch3_pwm, uint16_t top) { + bool was_on = (CH1_PWM>0) | (CH2_PWM>0) | (CH3_PWM>0); + bool now_on = (ch1_pwm>0) | (ch2_pwm>0) | (ch3_pwm>0); + + if (! now_on) { + CH1_PWM = 0; // linear + CH2_PWM = 0; // linear + CH3_PWM = 0; // DD FET + PWM_TOP = PWM_TOP_INIT; + PWM_CNT = 0; + CH1_ENABLE_PORT &= ~(1 << CH1_ENABLE_PIN); // disable opamp + CH2_ENABLE_PORT &= ~(1 << CH2_ENABLE_PIN); // disable opamp + return; + } + + if (ch1_pwm) + CH1_ENABLE_PORT |= (1 << CH1_ENABLE_PIN); // enable opamp + else + CH1_ENABLE_PORT &= ~(1 << CH1_ENABLE_PIN); // disable opamp + + if (ch2_pwm) + CH2_ENABLE_PORT |= (1 << CH2_ENABLE_PIN); // enable opamp + else + CH2_ENABLE_PORT &= ~(1 << CH2_ENABLE_PIN); // disable opamp + + CH1_PWM = ch1_pwm; + CH2_PWM = ch2_pwm; + CH3_PWM = ch3_pwm; + + // manual phase sync when changing level while already on + if (was_on && now_on) while(PWM_CNT > (top - 32)) {} + + PWM_TOP = top; + + // reset phase when turning on or off + //if ((! was_on) | (! now_on)) PWM_CNT = 0; + if (! was_on) PWM_CNT = 0; +} + +void set_level_zero() { + return set_pwms(0, 0, 0, PWM_TOP_INIT); +} + +void set_level_ch1(uint8_t level) { + uint8_t pwm1 = PWM_GET8 (pwm1_levels, level); + uint8_t pwm3 = PWM_GET8 (pwm2_levels, level); + uint16_t top = PWM_GET16(pwm3_levels, level); + set_pwms(pwm1, 0, pwm3, top); +} + +void set_level_ch2(uint8_t level) { + uint8_t pwm2 = PWM_GET8 (pwm4_levels, level); + uint16_t top = PWM_GET16(pwm5_levels, level); + set_pwms(0, pwm2, 0, top); +} + +void set_level_both(uint8_t level) { + uint8_t pwm1 = PWM_GET8 (pwm1_levels, level); + uint8_t pwm3 = PWM_GET8 (pwm2_levels, level); + uint16_t top = PWM_GET16(pwm3_levels, level); + set_pwms(pwm1, pwm1, pwm3, top); +} + +void set_level_blend(uint8_t level) { + uint16_t pwm1, pwm2; + uint8_t pwm3 = PWM_GET8 (pwm2_levels, level); // DD FET + //uint16_t brightness = PWM_GET8 (pwm1_levels, level) << 1; + uint16_t brightness = PWM_GET8 (pwm1_levels, level) + pwm3; + uint16_t top = PWM_GET16(pwm3_levels, level); + uint8_t blend = cfg.channel_mode_args[channel_mode]; + + calc_2ch_blend(&pwm1, &pwm2, brightness, top, blend); + + set_pwms(pwm1, pwm2, pwm3, top); +} + +void set_level_auto(uint8_t level) { + uint16_t pwm1, pwm2; + uint8_t brightness = PWM_GET8 (pwm4_levels, level); + uint16_t top = PWM_GET16(pwm5_levels, level); + uint8_t blend = 255 * (uint16_t)level / RAMP_SIZE; + if (cfg.channel_mode_args[channel_mode] & 0b01000000) + blend = 255 - blend; + + calc_2ch_blend(&pwm1, &pwm2, brightness, top, blend); + + set_pwms(pwm1, pwm2, 0, top); +} + + +///// bump each channel toward a target value ///// +bool gradual_adjust(uint8_t ch1_pwm, uint8_t ch2_pwm, uint8_t ch3_pwm) { + GRADUAL_ADJUST_STACKED(ch1_pwm, CH1_PWM, PWM_TOP_INIT); + GRADUAL_ADJUST_STACKED(ch2_pwm, CH2_PWM, PWM_TOP_INIT); + GRADUAL_ADJUST_SIMPLE (ch3_pwm, CH3_PWM); + + // check for completion + if ((ch1_pwm == CH1_PWM) + && (ch2_pwm == CH2_PWM) + && (ch3_pwm == CH3_PWM)) { + return true; // done + } + return false; // not done yet +} + +bool gradual_tick_ch1(uint8_t gt) { + uint8_t pwm1 = PWM_GET8(pwm1_levels, gt); + uint8_t pwm3 = PWM_GET8(pwm2_levels, gt); + return gradual_adjust(pwm1, 0, pwm3); +} + +bool gradual_tick_ch2(uint8_t gt) { + uint8_t pwm2 = PWM_GET8(pwm4_levels, gt); + return gradual_adjust(0, pwm2, 0); +} + +bool gradual_tick_both(uint8_t gt) { + uint8_t pwm1 = PWM_GET8(pwm1_levels, gt); + uint8_t pwm3 = PWM_GET8(pwm2_levels, gt); + return gradual_adjust(pwm1, pwm1, pwm3); +} + +bool gradual_tick_blend(uint8_t level) { + uint16_t pwm1, pwm2; + uint8_t pwm3 = PWM_GET8 (pwm2_levels, level); // DD FET + //uint16_t brightness = PWM_GET8 (pwm1_levels, level) << 1; + uint16_t brightness = PWM_GET8 (pwm1_levels, level) + pwm3; + uint16_t top = PWM_GET16(pwm3_levels, level); + uint8_t blend = cfg.channel_mode_args[channel_mode]; + + calc_2ch_blend(&pwm1, &pwm2, brightness, top, blend); + + return gradual_adjust(pwm1, pwm2, pwm3); +} + +bool gradual_tick_auto(uint8_t level) { + uint16_t pwm1, pwm2; + uint8_t brightness = PWM_GET8 (pwm4_levels, level); + uint16_t top = PWM_GET16(pwm5_levels, level); + uint8_t blend = 255 * (uint16_t)level / RAMP_SIZE; + if (cfg.channel_mode_args[channel_mode] & 0b01000000) + blend = 255 - blend; + + calc_2ch_blend(&pwm1, &pwm2, brightness, top, blend); + + return gradual_adjust(pwm1, pwm2, 0); +} + + diff --git a/hw/hank/emisar-2ch/fet/hwdef.h b/hw/hank/emisar-2ch/fet/hwdef.h new file mode 100644 index 0000000..1569d41 --- /dev/null +++ b/hw/hank/emisar-2ch/fet/hwdef.h @@ -0,0 +1,209 @@ +// Emisar 2-channel generic w/ tint ramping + DD FET +// Copyright (C) 2021-2023 Selene ToyKeeper +// SPDX-License-Identifier: GPL-3.0-or-later +#pragma once + +/* + * Pin / Name / Function + * 1 PA6 ch2 LED PWM (linear) (PWM1B) + * 2 PA5 R: red aux LED (PWM0B) + * 3 PA4 G: green aux LED + * 4 PA3 B: blue aux LED + * 5 PA2 button LED + * 6 PA1 Opamp 2 enable (channel 2 LEDs) + * 7 PA0 Opamp 1 enable (channel 1 LEDs) + * 8 GND GND + * 9 VCC VCC + * 10 PC5 (none) + * 11 PC4 (none) + * 12 PC3 RESET + * 13 PC2 (none) + * 14 PC1 SCK + * 15 PC0 ch1 LED PWM (FET) (PWM0A, 8-bit) + * 16 PB3 ch1 LED PWM (linear) (PWM1A) + * 17 PB2 MISO + * 18 PB1 MOSI / battery voltage (ADC6) + * 19 PB0 (none) + * 20 PA7 e-switch (PCINT7) + * ADC12 thermal sensor + * + * Both sets of LEDs use one pin to turn the Opamp on/off, + * and one pin to control the Opamp power level. + * The first channel also has a direct-drive FET for turbo. + */ + +#define ATTINY 1634 +#include <avr/io.h> + +#define HWDEF_C_FILE hank/emisar-2ch/fet/hwdef.c + +// allow using aux LEDs as extra channel modes +#include "fsm/chan-rgbaux.h" + +// channel modes: +// * 0. channel 1 only (linear + DD FET) +// * 1. channel 2 only (linear) +// * 2. both channels, tied together, max "200%" power + DD FET at top of ramp +// * 3. both channels, manual blend, max "100%" power + "200%" and DD FET at top of ramp +// * 4. both channels, auto blend, reversible (linear only) +#define NUM_CHANNEL_MODES (5 + NUM_RGB_AUX_CHANNEL_MODES) +enum channel_modes_e { + CM_CH1 = 0, + CM_CH2, + CM_BOTH, + CM_BLEND, + CM_AUTO, + RGB_AUX_ENUMS +}; + +// right-most bit first, modes are in fedcba9876543210 order +#define CHANNEL_MODES_ENABLED 0b0000000000011111 +#define USE_CHANNEL_MODE_ARGS +// _, _, _, 128=middle CCT, 0=warm-to-cool +#define CHANNEL_MODE_ARGS 0,0,0,128,0,RGB_AUX_CM_ARGS + +// can use some of the common handlers +#define USE_CALC_2CH_BLEND + + +#define PWM_CHANNELS 3 // old, remove this + +#define PWM_BITS 16 // 0 to 16383 at variable Hz, not 0 to 255 at 16 kHz +#define PWM_GET PWM_GET8 +#define PWM_DATATYPE uint16_t +#define PWM_DATATYPE2 uint16_t // only needs 32-bit if ramp values go over 255 +#define PWM1_DATATYPE uint8_t // linear part of linear+FET ramp +#define PWM2_DATATYPE uint8_t // DD FET part of linear+FET ramp +#define PWM3_DATATYPE uint16_t // linear+FET ramp tops +#define PWM4_DATATYPE uint8_t // linear-only ramp +#define PWM5_DATATYPE uint16_t // linear-only ramp tops + +// PWM parameters of both channels are tied together because they share a counter +#define PWM_TOP ICR1 // holds the TOP value for for variable-resolution PWM +#define PWM_TOP_INIT 255 // highest value used in top half of ramp +#define PWM_CNT TCNT1 // for dynamic PWM, reset phase + +// main LEDs, linear +#define CH1_PIN PB3 // pin 16, Opamp reference +#define CH1_PWM OCR1A // OCR1A is the output compare register for PB3 +#define CH1_ENABLE_PIN PA0 // pin 7, Opamp power +#define CH1_ENABLE_PORT PORTA // control port for PA0 + +// 2nd LEDs, linear +#define CH2_PIN PA6 // pin 1, 2nd LED Opamp reference +#define CH2_PWM OCR1B // OCR1B is the output compare register for PA6 +#define CH2_ENABLE_PIN PA1 // pin 6, Opamp power +#define CH2_ENABLE_PORT PORTA // control port for PA1 + +// main LEDs, DD FET +#define CH3_PIN PC0 // pin 15, DD FET PWM +#define CH3_PWM OCR0A // OCR0A is the output compare register for PC0 + +// e-switch +#ifndef SWITCH_PIN +#define SWITCH_PIN PA7 // pin 20 +#define SWITCH_PCINT PCINT7 // pin 20 pin change interrupt +#define SWITCH_PCIE PCIE0 // PCIE1 is for PCINT[7:0] +#define SWITCH_PCMSK PCMSK0 // PCMSK1 is for PCINT[7:0] +#define SWITCH_PORT PINA // PINA or PINB or PINC +#define SWITCH_PUE PUEA // pullup group A +#define PCINT_vect PCINT0_vect // ISR for PCINT[7:0] +#endif + +#define USE_VOLTAGE_DIVIDER // use a dedicated pin, not VCC, because VCC input is flattened +#define VOLTAGE_PIN PB1 // Pin 18 / PB1 / ADC6 +// pin to ADC mappings are in DS table 19-4 +#define VOLTAGE_ADC ADC6D // digital input disable pin for PB1 +// DIDR0/DIDR1 mappings are in DS section 19.13.5, 19.13.6 +#define VOLTAGE_ADC_DIDR DIDR1 // DIDR channel for ADC6D +// DS tables 19-3, 19-4 +// Bit 7 6 5 4 3 2 1 0 +// REFS1 REFS0 REFEN ADC0EN MUX3 MUX2 MUX1 MUX0 +// MUX[3:0] = 0, 1, 1, 0 for ADC6 / PB1 +// divided by ... +// REFS[1:0] = 1, 0 for internal 1.1V reference +// other bits reserved +#define ADMUX_VOLTAGE_DIVIDER 0b10000110 +#define ADC_PRSCL 0x07 // clk/128 + +// Raw ADC readings at 4.4V and 2.2V +// calibrate the voltage readout here +// estimated / calculated values are: +// (voltage - D1) * (R2/(R2+R1) * 1024 / 1.1) +// D1, R1, R2 = 0, 330, 100 +#ifndef ADC_44 +//#define ADC_44 981 // raw value at 4.40V +#define ADC_44 967 // manually tweaked so 4.16V will blink out 4.2 +#endif +#ifndef ADC_22 +//#define ADC_22 489 // raw value at 2.20V +#define ADC_22 482 // manually tweaked so 4.16V will blink out 4.2 +#endif + +// this light has aux LEDs under the optic +#define AUXLED_R_PIN PA5 // pin 2 +#define AUXLED_G_PIN PA4 // pin 3 +#define AUXLED_B_PIN PA3 // pin 4 +#define AUXLED_RGB_PORT PORTA // PORTA or PORTB or PORTC +#define AUXLED_RGB_DDR DDRA // DDRA or DDRB or DDRC +#define AUXLED_RGB_PUE PUEA // PUEA or PUEB or PUEC + +#define BUTTON_LED_PIN PA2 // pin 5 +#define BUTTON_LED_PORT PORTA // for all "PA" pins +#define BUTTON_LED_DDR DDRA // for all "PA" pins +#define BUTTON_LED_PUE PUEA // for all "PA" pins + + +inline void hwdef_setup() { + // enable output ports + DDRC = (1 << CH3_PIN); + DDRB = (1 << CH1_PIN); + DDRA = (1 << CH2_PIN) + | (1 << AUXLED_R_PIN) + | (1 << AUXLED_G_PIN) + | (1 << AUXLED_B_PIN) + | (1 << BUTTON_LED_PIN) + | (1 << CH1_ENABLE_PIN) + | (1 << CH2_ENABLE_PIN) + ; + + // configure PWM + // Setup PWM. F_pwm = F_clkio / 2 / N / TOP, where N = prescale factor, TOP = top of counter + // pre-scale for timer: N = 1 + // Linear opamp PWM for both main and 2nd LEDs (10-bit) + // WGM1[3:0]: 1,0,1,0: PWM, Phase Correct, adjustable (DS table 12-5) + // CS1[2:0]: 0,0,1: clk/1 (No prescaling) (DS table 12-6) + // COM1A[1:0]: 1,0: PWM OC1A in the normal direction (DS table 12-4) + // COM1B[1:0]: 1,0: PWM OC1B in the normal direction (DS table 12-4) + TCCR1A = (1<<WGM11) | (0<<WGM10) // adjustable PWM (TOP=ICR1) (DS table 12-5) + | (1<<COM1A1) | (0<<COM1A0) // PWM 1A in normal direction (DS table 12-4) + | (1<<COM1B1) | (0<<COM1B0) // PWM 1B in normal direction (DS table 12-4) + ; + TCCR1B = (0<<CS12) | (0<<CS11) | (1<<CS10) // clk/1 (no prescaling) (DS table 12-6) + | (1<<WGM13) | (0<<WGM12) // phase-correct adjustable PWM (DS table 12-5) + ; + + // FET PWM (8-bit; this channel can't do 10-bit) + // WGM0[2:0]: 0,0,1: PWM, Phase Correct, 8-bit (DS table 11-8) + // CS0[2:0]: 0,0,1: clk/1 (No prescaling) (DS table 11-9) + // COM0A[1:0]: 1,0: PWM OC0A in the normal direction (DS table 11-4) + // COM0B[1:0]: 1,0: PWM OC0B in the normal direction (DS table 11-7) + TCCR0A = (0<<WGM01) | (1<<WGM00) // 8-bit (TOP=0xFF) (DS table 11-8) + | (1<<COM0A1) | (0<<COM0A0) // PWM 0A in normal direction (DS table 11-4) + //| (1<<COM0B1) | (0<<COM0B0) // PWM 0B in normal direction (DS table 11-7) + ; + TCCR0B = (0<<CS02) | (0<<CS01) | (1<<CS00) // clk/1 (no prescaling) (DS table 11-9) + | (0<<WGM02) // phase-correct PWM (DS table 11-8) + ; + + // set PWM resolution + PWM_TOP = PWM_TOP_INIT; + + // set up e-switch + SWITCH_PUE = (1 << SWITCH_PIN); // pull-up for e-switch + SWITCH_PCMSK = (1 << SWITCH_PCINT); // enable pin change interrupt +} + + +#define LAYOUT_DEFINED + |