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authorUri Shaked2020-09-02 13:29:54 +0300
committerUri Shaked2020-09-02 13:29:54 +0300
commit0d2405caf3b4c65a2d2b8a9555b1d929a9e44229 (patch)
tree9700e85beb642865457b3d65a60b1e5e4bc7df26
parent0.11.0 (diff)
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fix(instruction): EICALL is broken
close #59
-rw-r--r--src/cpu/instruction.spec.ts1
-rw-r--r--src/cpu/instruction.ts3
2 files changed, 3 insertions, 1 deletions
diff --git a/src/cpu/instruction.spec.ts b/src/cpu/instruction.spec.ts
index 0bf71bd..0665fe8 100644
--- a/src/cpu/instruction.spec.ts
+++ b/src/cpu/instruction.spec.ts
@@ -240,6 +240,7 @@ describe('avrInstruction', () => {
avrInstruction(cpu);
expect(cpu.pc).toEqual(0x11234);
expect(cpu.cycles).toEqual(4);
+ expect(cpu.data[SP]).toEqual(0x80 - 3); // according to datasheet: SP ← SP - 3
expect(cpu.data[0x80]).toEqual(1); // Return address
});
diff --git a/src/cpu/instruction.ts b/src/cpu/instruction.ts
index 51bc3ab..e82b811 100644
--- a/src/cpu/instruction.ts
+++ b/src/cpu/instruction.ts
@@ -224,7 +224,8 @@ export function avrInstruction(cpu: ICPU) {
const eind = cpu.data[0x3c];
cpu.data[sp] = retAddr & 255;
cpu.data[sp - 1] = (retAddr >> 8) & 255;
- cpu.dataView.setUint16(93, sp - 2, true);
+ cpu.data[sp - 2] = (retAddr >> 16) & 255;
+ cpu.dataView.setUint16(93, sp - 3, true);
cpu.pc = ((eind << 16) | cpu.dataView.getUint16(30, true)) - 1;
cpu.cycles += 3;
} else if (opcode === 0x9419) {
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