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authorUri Shaked2020-04-02 13:18:05 +0300
committerUri Shaked2020-04-02 13:18:05 +0300
commit958691d82600406110b49b41b5ca11d4c4597a00 (patch)
tree20c4c670675e1e91486a52e506f65d08842041df
parenttest(instruction): use assembly in tests (diff)
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fix: GPIO port listeners not invoked when writing to DDR registers
close #28
-rw-r--r--src/peripherals/gpio.spec.ts16
-rw-r--r--src/peripherals/gpio.ts4
2 files changed, 17 insertions, 3 deletions
diff --git a/src/peripherals/gpio.spec.ts b/src/peripherals/gpio.spec.ts
index 5a282e6..f3b1a0f 100644
--- a/src/peripherals/gpio.spec.ts
+++ b/src/peripherals/gpio.spec.ts
@@ -6,13 +6,23 @@ describe('GPIO', () => {
const cpu = new CPU(new Uint16Array(1024));
const port = new AVRIOPort(cpu, portBConfig);
const listener = jest.fn();
- port.addListener(listener);
cpu.writeData(0x24, 0x0f); // DDRB <- 0x0f
+ port.addListener(listener);
cpu.writeData(0x25, 0x55); // PORTB <- 0x55
expect(listener).toHaveBeenCalledWith(0x05, 0);
expect(cpu.data[0x23]).toEqual(0x5); // PINB should return port value
});
+ it('should invoke the listeners when DDR changes (issue #28)', () => {
+ const cpu = new CPU(new Uint16Array(1024));
+ const port = new AVRIOPort(cpu, portBConfig);
+ const listener = jest.fn();
+ cpu.writeData(0x25, 0x55); // PORTB <- 0x55
+ port.addListener(listener);
+ cpu.writeData(0x24, 0xf0); // DDRB <- 0xf0
+ expect(listener).toHaveBeenCalledWith(0x50, 0);
+ });
+
it('should toggle the pin when writing to the PIN register', () => {
const cpu = new CPU(new Uint16Array(1024));
const port = new AVRIOPort(cpu, portBConfig);
@@ -34,7 +44,7 @@ describe('GPIO', () => {
cpu.writeData(0x24, 0x0f); // DDRB <- 0x0f
port.removeListener(listener);
cpu.writeData(0x25, 0x99); // PORTB <- 0x99
- expect(listener).not.toHaveBeenCalled();
+ expect(listener).toBeCalledTimes(1);
});
});
@@ -76,9 +86,9 @@ describe('GPIO', () => {
const listener = jest.fn(() => {
expect(port.pinState(0)).toBe(PinState.High);
});
- port.addListener(listener);
expect(port.pinState(0)).toBe(PinState.Input);
cpu.writeData(0x24, 0x01); // DDRB <- 0x01
+ port.addListener(listener);
cpu.writeData(0x25, 0x01); // PORTB <- 0x01
expect(listener).toHaveBeenCalled();
});
diff --git a/src/peripherals/gpio.ts b/src/peripherals/gpio.ts
index a667967..35030b8 100644
--- a/src/peripherals/gpio.ts
+++ b/src/peripherals/gpio.ts
@@ -94,6 +94,10 @@ export class AVRIOPort {
private listeners: GPIOListener[] = [];
constructor(private cpu: CPU, private portConfig: AVRPortConfig) {
+ cpu.writeHooks[portConfig.DDR] = (value, oldValue) => {
+ const portValue = cpu.data[portConfig.PORT];
+ this.writeGpio(value & portValue, oldValue & oldValue);
+ };
cpu.writeHooks[portConfig.PORT] = (value: u8, oldValue: u8) => {
const ddrMask = cpu.data[portConfig.DDR];
cpu.data[portConfig.PORT] = value;
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