aboutsummaryrefslogtreecommitdiff
path: root/src/peripherals/eeprom.spec.ts
diff options
context:
space:
mode:
authorUri Shaked2020-07-16 20:39:27 +0300
committerUri Shaked2020-07-16 20:39:27 +0300
commite319f6f7f487d4ef27bf89c26e04646aa3b9b4db (patch)
tree9dcc89b8f96e2013551bba2d3f6d44eb28ee493c /src/peripherals/eeprom.spec.ts
parent0.10.0 (diff)
downloadavr8js-e319f6f7f487d4ef27bf89c26e04646aa3b9b4db.tar.gz
avr8js-e319f6f7f487d4ef27bf89c26e04646aa3b9b4db.tar.bz2
avr8js-e319f6f7f487d4ef27bf89c26e04646aa3b9b4db.zip
fix(eeprom): EEPROM write fails after first attempt
close #54
Diffstat (limited to 'src/peripherals/eeprom.spec.ts')
-rw-r--r--src/peripherals/eeprom.spec.ts32
1 files changed, 32 insertions, 0 deletions
diff --git a/src/peripherals/eeprom.spec.ts b/src/peripherals/eeprom.spec.ts
index ba66100..75cd5ea 100644
--- a/src/peripherals/eeprom.spec.ts
+++ b/src/peripherals/eeprom.spec.ts
@@ -160,6 +160,38 @@ describe('EEPROM', () => {
expect(eepromBackend.memory[15]).toEqual(0x55);
expect(eepromBackend.memory[16]).toEqual(0xff);
});
+
+ it('should write two bytes sucessfully', () => {
+ const cpu = new CPU(new Uint16Array(0x1000));
+ const eepromBackend = new EEPROMMemoryBackend(1024);
+ const eeprom = new AVREEPROM(cpu, eepromBackend);
+
+ // Write 0x55 to address 15
+ cpu.writeData(EEDR, 0x55);
+ cpu.writeData(EEARL, 15);
+ cpu.writeData(EEARH, 0);
+ cpu.writeData(EECR, EEMPE);
+ cpu.writeData(EECR, EEPE);
+ eeprom.tick();
+ expect(cpu.cycles).toEqual(2);
+
+ // wait long enough time for the first write to finish
+ cpu.cycles += 10000000;
+ eeprom.tick();
+
+ // Write 0x66 to address 16
+ cpu.writeData(EEDR, 0x66);
+ cpu.writeData(EEARL, 16);
+ cpu.writeData(EEARH, 0);
+ cpu.writeData(EECR, EEMPE);
+ cpu.writeData(EECR, EEPE);
+ eeprom.tick();
+
+ // Ensure both writes took place
+ expect(cpu.cycles).toEqual(10000004);
+ expect(eepromBackend.memory[15]).toEqual(0x55);
+ expect(eepromBackend.memory[16]).toEqual(0x66);
+ });
});
describe('EEPROM erase', () => {