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authorApexo2026-04-02 20:58:40 +0200
committerApexo2026-04-02 20:58:40 +0200
commit873c1b2a584a58fc89f0f85e772b653271c8e9c5 (patch)
treef4c72b31c800d601d2d092fa058cc7e0561bb394 /src/peripherals/avrdx-adc.ts
parentADC: stop conversion when disabled via CTRLA (diff)
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ADC: stop when going to sleep (except idle)
Diffstat (limited to 'src/peripherals/avrdx-adc.ts')
-rw-r--r--src/peripherals/avrdx-adc.ts7
1 files changed, 6 insertions, 1 deletions
diff --git a/src/peripherals/avrdx-adc.ts b/src/peripherals/avrdx-adc.ts
index ed49ce6..716c4c7 100644
--- a/src/peripherals/avrdx-adc.ts
+++ b/src/peripherals/avrdx-adc.ts
@@ -3,6 +3,7 @@
import type { CPU, AVRInterruptConfig } from 'avr8js/cpu/cpu';
import type { AVRDxVREF } from './avrdx-vref';
+import { SMODE_IDLE_gc, type AVRDxSLPCTRL } from './avrdx-slpctrl';
const CTRLA = 0x0000;
const CTRLB = 0x0001;
@@ -72,7 +73,7 @@ export class AVRDxADC {
private readonly resrdyIrq: AVRInterruptConfig;
- constructor(private cpu: CPU, private base: number, resrdyIrqNo: number, private vref: AVRDxVREF) {
+ constructor(private cpu: CPU, private base: number, resrdyIrqNo: number, private vref: AVRDxVREF, private slpctrl: AVRDxSLPCTRL) {
this.resrdyIrq = {
address: resrdyIrqNo * 2, // vector 26, word addr 0x34
flagRegister: base + INTFLAGS,
@@ -117,6 +118,10 @@ export class AVRDxADC {
// RES registers - read only (but firmware can read them)
cpu.writeHooks[base + RESL] = () => true; // ignore writes
cpu.writeHooks[base + RESH] = () => true;
+
+ slpctrl.onSleep((mode) => {
+ if (mode !== SMODE_IDLE_gc) this.stop();
+ });
}
private stop() {
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