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| author | Selene ToyKeeper | 2023-11-30 09:19:45 -0700 |
|---|---|---|
| committer | Selene ToyKeeper | 2023-11-30 09:19:45 -0700 |
| commit | f745e12c3bc48d8fe544893871191086cf3cccc9 (patch) | |
| tree | 0e7f6c2c5f362719ac4efad9d5c2365f3ed3c159 /hw/thefreeman/avr32dd20-devkit/hwdef.c | |
| parent | added md5sum to build-all.sh output per target (diff) | |
| parent | eliminated direct CCP register access from arch/attiny1616 (diff) | |
| download | anduril-f745e12c3bc48d8fe544893871191086cf3cccc9.tar.gz anduril-f745e12c3bc48d8fe544893871191086cf3cccc9.tar.bz2 anduril-f745e12c3bc48d8fe544893871191086cf3cccc9.zip | |
Merge branch 'avr32dd20-devkit' into trunk
Added support for AVR DD MCUs, particularly avr32dd20. Also did a bunch
of refactoring for how MCU support works, cleaned up the ADC code,
switched to consistent internal formats for voltage and temperature,
fixed the FW3X, and some other little things.
* avr32dd20-devkit: (28 commits)
eliminated direct CCP register access from arch/attiny1616
made the avr32dd20 flashing script more universal
added a build target for FW3X with manually-fixed RGB aux wiring
prevent future issues like the FW3X had
fixed FW3X thermal regulation
fixed incorrect temperature history for a few seconds after waking
fsm/adc: removed dead code
FW3X: fixed external temperature sensor
FW3X: multiple upgrades...
fw3x: fixed swapped red+blue, fixed battery measurements, added police color strobe
fixed ADC on sp10-pro
fixed ADC on attiny85 and related builds
fixed ADC on attiny1634 and related builds
more ADC / DAC / MCU progress...
avr32dd20-devkit: make the defaults a bit more dev friendly (realtime voltage colors, and no simple UI by default)
ADC voltage: battcheck 3 digits, fixed t1616, switched back to 8-bit internal volt unit
got ADC voltage+temp working on avrdd... but broke all other builds/MCUs
1.55V AA battery should not show as "white" voltage color, only purple
started refactoring fsm/adc.*, but need a checkpoint before continuing
added dac-scale.py: short script to calculate avrdd DAC+Vref values from level_calc.py ramp data
...
Diffstat (limited to 'hw/thefreeman/avr32dd20-devkit/hwdef.c')
| -rw-r--r-- | hw/thefreeman/avr32dd20-devkit/hwdef.c | 118 |
1 files changed, 118 insertions, 0 deletions
diff --git a/hw/thefreeman/avr32dd20-devkit/hwdef.c b/hw/thefreeman/avr32dd20-devkit/hwdef.c new file mode 100644 index 0000000..3e5dd79 --- /dev/null +++ b/hw/thefreeman/avr32dd20-devkit/hwdef.c @@ -0,0 +1,118 @@ +// thefreeman boost driver 2.1 output helper functions +// Copyright (C) 2023 Selene ToyKeeper +// SPDX-License-Identifier: GPL-3.0-or-later +#pragma once + +#include "fsm/chan-rgbaux.c" + +void set_level_zero(); + +void set_level_main(uint8_t level); +bool gradual_tick_main(uint8_t gt); + + +Channel channels[] = { + { // main LEDs + .set_level = set_level_main, + .gradual_tick = gradual_tick_main + }, + RGB_AUX_CHANNELS +}; + + +void set_level_zero() { + DAC_LVL = 0; // DAC off + DAC_VREF = V10; // low Vref + HDR_ENABLE_PORT &= ~(1 << HDR_ENABLE_PIN); // HDR off + + // prevent post-off flash + IN_NFET_ENABLE_PORT |= (1 << IN_NFET_ENABLE_PIN); + delay_4ms(IN_NFET_DELAY_TIME/4); + IN_NFET_ENABLE_PORT &= ~(1 << IN_NFET_ENABLE_PIN); + + // turn off boost last + BST_ENABLE_PORT &= ~(1 << BST_ENABLE_PIN); // BST off +} + +// single set of LEDs with 1 regulated power channel +// and low/high HDR plus low/high Vref as different "gears" +void set_level_main(uint8_t level) { + uint8_t noflash = 0; + + // when turning on from off, use IN_NFET to prevent a flash + if ((! actual_level) && (level < HDR_ENABLE_LEVEL_MIN)) { + noflash = 1; + IN_NFET_ENABLE_PORT |= (1 << IN_NFET_ENABLE_PIN); + } + + // BST on first, to give it a few extra microseconds to spin up + BST_ENABLE_PORT |= (1 << BST_ENABLE_PIN); + + // pre-load ramp data so it can be assigned faster later + // DAC level register is left-aligned + PWM1_DATATYPE dac_lvl = PWM1_GET(level) << 6; + PWM2_DATATYPE dac_vref = PWM2_GET(level); + + // enable HDR on top half of ramp + if (level >= (HDR_ENABLE_LEVEL_MIN-1)) + HDR_ENABLE_PORT |= (1 << HDR_ENABLE_PIN); + else + HDR_ENABLE_PORT &= ~(1 << HDR_ENABLE_PIN); + + // set these in successive clock cycles to avoid getting out of sync + // (minimizes ramp bumps when changing gears) + DAC_LVL = dac_lvl; + DAC_VREF = dac_vref; + + if (noflash) { + // wait for flash prevention to finish + delay_4ms(IN_NFET_DELAY_TIME/4); + IN_NFET_ENABLE_PORT &= ~(1 << IN_NFET_ENABLE_PIN); + } +} + +bool gradual_tick_main(uint8_t gt) { + // if HDR and Vref "engine gear" is the same, do a small adjustment... + // otherwise, simply jump to the next ramp level + // and let set_level() handle any gear changes + + // different gear = full adjustment + PWM2_DATATYPE vref_next = PWM2_GET(gt); + if (vref_next != DAC_VREF) return true; // let parent set_level() for us + + // same gear = small adjustment + PWM1_DATATYPE dac_now = DAC_LVL >> 6; // register is left-aligned + PWM1_DATATYPE dac_next = PWM1_GET(gt); + + // adjust multiple times based on how far until the next level + // (so it adjusts faster/coarser for big steps) + + int16_t diff = (dac_next - dac_now); + if (diff < 0) diff = -diff; + + // ~70 max DAC levels per ramp step, 1 + (70 >> 3) = max 10 + uint8_t steps; + steps = 1 + (diff >> 3); + for (uint8_t i=0; i<=steps; i++) + GRADUAL_ADJUST_SIMPLE(dac_next, dac_now); + + DAC_LVL = dac_now << 6; + + if (dac_next == dac_now) return true; // done + + return false; // not done yet +} + + +uint8_t voltage_raw2cooked(uint16_t measurement) { + // In : 65535 * BATTLVL / 1.024V + // Out: uint8_t: Vbat * 40 + // BATTLVL = Vbat * (100.0/(330+100)) = Vbat / 4.3 + // So, Out = In * 4.3 / 1600 + // (plus a bit of fudging to fix the slope and offset, + // based on measuring actual hardware) + uint8_t result = (uint32_t)(measurement + (65535 * 4 / 1024)) + * 43 / 16128; + return result; +} + |
