diff options
| author | Selene ToyKeeper | 2020-03-13 18:04:43 -0600 |
|---|---|---|
| committer | Selene ToyKeeper | 2020-03-13 18:04:43 -0600 |
| commit | 51aae811654a3b73fa10ab449e22a11c858aa2d1 (patch) | |
| tree | 8bec4aa2d09e834918a9d7a3a89e134e62d9cf56 /hwdef-FW3A.h | |
| parent | went back to continuous lowpass because it had the best noise reduction (diff) | |
| download | anduril-51aae811654a3b73fa10ab449e22a11c858aa2d1.tar.gz anduril-51aae811654a3b73fa10ab449e22a11c858aa2d1.tar.bz2 anduril-51aae811654a3b73fa10ab449e22a11c858aa2d1.zip | |
went back to slower clk/128 ADC timing
Diffstat (limited to 'hwdef-FW3A.h')
| -rw-r--r-- | hwdef-FW3A.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hwdef-FW3A.h b/hwdef-FW3A.h index 0b94635..a223b08 100644 --- a/hwdef-FW3A.h +++ b/hwdef-FW3A.h @@ -35,7 +35,7 @@ //#define ADC_CHANNEL 0x01 // MUX 01 corresponds with PB2 //#define ADC_DIDR ADC1D // Digital input disable bit corresponding with PB2 #endif -#define ADC_PRSCL 0x06 // clk/64 +#define ADC_PRSCL 0x07 // clk/128 // average drop across diode on this hardware #ifndef VOLTAGE_FUDGE_FACTOR |