diff options
| -rw-r--r-- | hwdef-BLF_Q8-T1616.h | 14 | ||||
| -rw-r--r-- | hwdef-Sofirn_SP10S.h | 14 | ||||
| -rw-r--r-- | hwdef-gchart-fet1-t1616.h | 17 | ||||
| -rw-r--r-- | spaghetti-monster/anduril/factory-reset.c | 4 | ||||
| -rw-r--r-- | spaghetti-monster/anduril/version.h | 5 | ||||
| -rw-r--r-- | tk-attiny.h | 16 |
6 files changed, 43 insertions, 27 deletions
diff --git a/hwdef-BLF_Q8-T1616.h b/hwdef-BLF_Q8-T1616.h index 2a0e6ff..d6ad760 100644 --- a/hwdef-BLF_Q8-T1616.h +++ b/hwdef-BLF_Q8-T1616.h @@ -61,8 +61,8 @@ Driver pinout: // ... so just hardcode it in each hwdef file instead inline void hwdef_setup() { - // set up the system clock to run at 5 MHz instead of the default 3.33 MHz - _PROTECTED_WRITE( CLKCTRL.MCLKCTRLB, CLKCTRL_PDIV_4X_gc | CLKCTRL_PEN_bm ); + // set up the system clock to run at 10 MHz instead of the default 3.33 MHz + _PROTECTED_WRITE( CLKCTRL.MCLKCTRLB, CLKCTRL_PDIV_2X_gc | CLKCTRL_PEN_bm ); //VPORTA.DIR = ...; VPORTB.DIR = PIN0_bm | PIN1_bm | PIN5_bm; // Outputs: Aux LED and PWMs @@ -91,8 +91,14 @@ inline void hwdef_setup() { PORTC.PIN3CTRL = PORT_PULLUPEN_bm; // set up the PWM - // TODO: add references to MCU documentation - TCA0.SINGLE.CTRLB = TCA_SINGLE_CMP0EN_bm | TCA_SINGLE_CMP1EN_bm | TCA_SINGLE_WGMODE_SINGLESLOPE_gc; + // https://ww1.microchip.com/downloads/en/DeviceDoc/ATtiny1614-16-17-DataSheet-DS40002204A.pdf + // PB0 is TCA0:WO0, use TCA_SINGLE_CMP0EN_bm + // PB1 is TCA0:WO1, use TCA_SINGLE_CMP1EN_bm + // PB2 is TCA0:WO2, use TCA_SINGLE_CMP2EN_bm + // For Fast (Single Slope) PWM use TCA_SINGLE_WGMODE_SINGLESLOPE_gc + // For Phase Correct (Dual Slope) PWM use TCA_SINGLE_WGMODE_DSBOTTOM_gc + // See the manual for other pins, clocks, configs, portmux, etc + TCA0.SINGLE.CTRLB = TCA_SINGLE_CMP0EN_bm | TCA_SINGLE_CMP1EN_bm | TCA_SINGLE_WGMODE_DSBOTTOM_gc; TCA0.SINGLE.PER = 255; TCA0.SINGLE.CTRLA = TCA_SINGLE_CLKSEL_DIV1_gc | TCA_SINGLE_ENABLE_bm; } diff --git a/hwdef-Sofirn_SP10S.h b/hwdef-Sofirn_SP10S.h index 0ee3332..5760037 100644 --- a/hwdef-Sofirn_SP10S.h +++ b/hwdef-Sofirn_SP10S.h @@ -83,8 +83,8 @@ ATTINY1616 Mapping: // ... so just hardcode it in each hwdef file instead inline void hwdef_setup() { - // set up the system clock to run at 5 MHz instead of the default 3.33 MHz - _PROTECTED_WRITE( CLKCTRL.MCLKCTRLB, CLKCTRL_PDIV_4X_gc | CLKCTRL_PEN_bm ); + // set up the system clock to run at 10 MHz instead of the default 3.33 MHz + _PROTECTED_WRITE( CLKCTRL.MCLKCTRLB, CLKCTRL_PDIV_2X_gc | CLKCTRL_PEN_bm ); VPORTA.DIR = PIN1_bm; // Boost enable pin VPORTB.DIR = PIN0_bm | PIN5_bm; // PWM pins as output @@ -113,9 +113,15 @@ inline void hwdef_setup() { PORTC.PIN3CTRL = PORT_PULLUPEN_bm; // set up the PWM - // TODO: add references to MCU documentation + // https://ww1.microchip.com/downloads/en/DeviceDoc/ATtiny1614-16-17-DataSheet-DS40002204A.pdf + // PB0 is TCA0:WO0, use TCA_SINGLE_CMP0EN_bm + // PB1 is TCA0:WO1, use TCA_SINGLE_CMP1EN_bm + // PB2 is TCA0:WO2, use TCA_SINGLE_CMP2EN_bm + // For Fast (Single Slope) PWM use TCA_SINGLE_WGMODE_SINGLESLOPE_gc + // For Phase Correct (Dual Slope) PWM use TCA_SINGLE_WGMODE_DSBOTTOM_gc + // See the manual for other pins, clocks, configs, portmux, etc PORTMUX.CTRLC = PORTMUX_TCA02_ALTERNATE_gc; // Use alternate pin for TCA0:WO2 - TCA0.SINGLE.CTRLB = TCA_SINGLE_CMP0EN_bm | TCA_SINGLE_CMP2EN_bm | TCA_SINGLE_WGMODE_SINGLESLOPE_gc; + TCA0.SINGLE.CTRLB = TCA_SINGLE_CMP0EN_bm | TCA_SINGLE_CMP2EN_bm | TCA_SINGLE_WGMODE_DSBOTTOM_gc; TCA0.SINGLE.PER = 255; TCA0.SINGLE.CTRLA = TCA_SINGLE_CLKSEL_DIV1_gc | TCA_SINGLE_ENABLE_bm; } diff --git a/hwdef-gchart-fet1-t1616.h b/hwdef-gchart-fet1-t1616.h index 365ecd7..2435b99 100644 --- a/hwdef-gchart-fet1-t1616.h +++ b/hwdef-gchart-fet1-t1616.h @@ -60,8 +60,8 @@ Read voltage from VCC pin, has diode with ~0.4v drop // ... so just hardcode it in each hwdef file instead inline void hwdef_setup() { - // set up the system clock to run at 5 MHz instead of the default 3.33 MHz - _PROTECTED_WRITE( CLKCTRL.MCLKCTRLB, CLKCTRL_PDIV_4X_gc | CLKCTRL_PEN_bm ); + // set up the system clock to run at 10 MHz instead of the default 3.33 MHz + _PROTECTED_WRITE( CLKCTRL.MCLKCTRLB, CLKCTRL_PDIV_2X_gc | CLKCTRL_PEN_bm ); //VPORTA.DIR = 0b00000010; VPORTB.DIR = PIN0_bm | PIN1_bm | PIN3_bm; @@ -90,11 +90,14 @@ inline void hwdef_setup() { PORTC.PIN3CTRL = PORT_PULLUPEN_bm; // set up the PWM - // TODO: add references to MCU documentation - // TODO: measure 5 MHz fast PWM vs 10 MHz phase-correct, to see if it - // still has issues at 0/255 and 255/255 like older models did - // (and maybe switch to phase-correct@10MHz) - TCA0.SINGLE.CTRLB = TCA_SINGLE_CMP0EN_bm | TCA_SINGLE_CMP1EN_bm | TCA_SINGLE_WGMODE_SINGLESLOPE_gc; + // https://ww1.microchip.com/downloads/en/DeviceDoc/ATtiny1614-16-17-DataSheet-DS40002204A.pdf + // PB0 is TCA0:WO0, use TCA_SINGLE_CMP0EN_bm + // PB1 is TCA0:WO1, use TCA_SINGLE_CMP1EN_bm + // PB2 is TCA0:WO2, use TCA_SINGLE_CMP2EN_bm + // For Fast (Single Slope) PWM use TCA_SINGLE_WGMODE_SINGLESLOPE_gc + // For Phase Correct (Dual Slope) PWM use TCA_SINGLE_WGMODE_DSBOTTOM_gc + // See the manual for other pins, clocks, configs, portmux, etc + TCA0.SINGLE.CTRLB = TCA_SINGLE_CMP0EN_bm | TCA_SINGLE_CMP1EN_bm | TCA_SINGLE_WGMODE_DSBOTTOM_gc; TCA0.SINGLE.PER = 255; TCA0.SINGLE.CTRLA = TCA_SINGLE_CLKSEL_DIV1_gc | TCA_SINGLE_ENABLE_bm; } diff --git a/spaghetti-monster/anduril/factory-reset.c b/spaghetti-monster/anduril/factory-reset.c index c327e65..f05b5eb 100644 --- a/spaghetti-monster/anduril/factory-reset.c +++ b/spaghetti-monster/anduril/factory-reset.c @@ -44,8 +44,12 @@ void factory_reset() { // explode, if button pressed long enough if (reset) { #ifdef USE_THERMAL_REGULATION + #ifdef AVRXMEGA3 // AVR 1-Series has factory calibrated thermal sensor, remove the offset + thermal_config_save(1,temperature - therm_cal_offset); // this will cancel out the offset + #else // auto-calibrate temperature... assume current temperature is 21 C thermal_config_save(1, 21); + #endif // AVRXMEGA3 #endif // save all settings to eeprom // (assuming they're all at default because we haven't loaded them yet) diff --git a/spaghetti-monster/anduril/version.h b/spaghetti-monster/anduril/version.h index 8cf3c90..dd9c703 100644 --- a/spaghetti-monster/anduril/version.h +++ b/spaghetti-monster/anduril/version.h @@ -1,4 +1 @@ -// this file is replaced automatically by the build script -// set your own date here if you're not using the build script -// otherwise, default to first human contact with the moon -#define VERSION_NUMBER "19690720" +#define VERSION_NUMBER "20210503" diff --git a/tk-attiny.h b/tk-attiny.h index ae70afd..110507b 100644 --- a/tk-attiny.h +++ b/tk-attiny.h @@ -73,7 +73,7 @@ //#define VOLTAGE_ADC_DIDR DIDR0 // set this in hwdef #elif (ATTINY == 412) || (ATTINY == 416) || (ATTINY == 417) || (ATTINY == 816) || (ATTINY == 817) || (ATTINY == 1616) || (ATTINY == 1617) || (ATTINY == 3216) || (ATTINY == 3217) #define AVRXMEGA3 - #define F_CPU 5000000UL + #define F_CPU 10000000UL #define BOGOMIPS (F_CPU/4000) #define EEPSIZE 128 #define DELAY_ZERO_TIME 1020 @@ -155,14 +155,14 @@ } typedef enum { - // Actual clock is 20 MHz, but assume that 5 MHz is the top speed and work from there + // Actual clock is 20 MHz, but assume that 10 MHz is the top speed and work from there // TODO: measure PWM speed and power use at 1.25/2.5/5/10 MHz, to determine which speeds are optimal - clock_div_1 = (CLKCTRL_PDIV_4X_gc | CLKCTRL_PEN_bm), // 5 MHz - clock_div_2 = (CLKCTRL_PDIV_8X_gc | CLKCTRL_PEN_bm), // 2.5 MHz - clock_div_4 = (CLKCTRL_PDIV_16X_gc | CLKCTRL_PEN_bm), // 1.25 MHz - clock_div_8 = (CLKCTRL_PDIV_32X_gc | CLKCTRL_PEN_bm), // 625 kHz - clock_div_16 = (CLKCTRL_PDIV_64X_gc | CLKCTRL_PEN_bm), // 312 kHz, max without changing to the 32 kHz ULP - clock_div_32 = (CLKCTRL_PDIV_64X_gc | CLKCTRL_PEN_bm), // 312 kHz + clock_div_1 = (CLKCTRL_PDIV_2X_gc | CLKCTRL_PEN_bm), // 10 MHz + clock_div_2 = (CLKCTRL_PDIV_4X_gc | CLKCTRL_PEN_bm), // 5 MHz + clock_div_4 = (CLKCTRL_PDIV_8X_gc | CLKCTRL_PEN_bm), // 2.5 MHz + clock_div_8 = (CLKCTRL_PDIV_16X_gc | CLKCTRL_PEN_bm), // 1.25 MHz + clock_div_16 = (CLKCTRL_PDIV_32X_gc | CLKCTRL_PEN_bm), // 625 kHz + clock_div_32 = (CLKCTRL_PDIV_64X_gc | CLKCTRL_PEN_bm), // 312 kHz, max without changing to the 32 kHz ULP clock_div_64 = (CLKCTRL_PDIV_64X_gc | CLKCTRL_PEN_bm), // 312 kHz clock_div_128 = (CLKCTRL_PDIV_64X_gc | CLKCTRL_PEN_bm), // 312 kHz clock_div_256 = (CLKCTRL_PDIV_64X_gc | CLKCTRL_PEN_bm) // 312 kHz |